From 8ab989e31561cea0c6af5d5e242dd2be97bc73b4 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Sat, 30 Jul 2016 17:46:17 +0200 Subject: src/mainboard: Capitalize ROM, RAM, CPU and APIC Change-Id: Ia1f24d328a065a54975adde067df36c5751bff2d Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/15987 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/mainboard/technexion/tim5690/fadt.c | 2 +- src/mainboard/technexion/tim8690/fadt.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard/technexion') diff --git a/src/mainboard/technexion/tim5690/fadt.c b/src/mainboard/technexion/tim5690/fadt.c index 4afb0b9e4c..f9768b20bd 100644 --- a/src/mainboard/technexion/tim5690/fadt.c +++ b/src/mainboard/technexion/tim5690/fadt.c @@ -25,7 +25,7 @@ #include "southbridge/amd/sb600/sb600.h" /*extern*/ u16 pm_base = 0x800; -/* pm_base should be set in sb acpi */ +/* pm_base should be set in sb ACPI */ /* pm_base should be got from bar2 of rs690. Here I compact ACPI * registers into 32 bytes limit. * */ diff --git a/src/mainboard/technexion/tim8690/fadt.c b/src/mainboard/technexion/tim8690/fadt.c index 4afb0b9e4c..f9768b20bd 100644 --- a/src/mainboard/technexion/tim8690/fadt.c +++ b/src/mainboard/technexion/tim8690/fadt.c @@ -25,7 +25,7 @@ #include "southbridge/amd/sb600/sb600.h" /*extern*/ u16 pm_base = 0x800; -/* pm_base should be set in sb acpi */ +/* pm_base should be set in sb ACPI */ /* pm_base should be got from bar2 of rs690. Here I compact ACPI * registers into 32 bytes limit. * */ -- cgit v1.2.3