From cb5f0ce6a74e94b964ab2c37ab41a03a4c8b966d Mon Sep 17 00:00:00 2001 From: Greg Watson Date: Fri, 4 Jun 2004 22:27:33 +0000 Subject: fix addressing git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1599 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/totalimpact/briq/Config.lb | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) (limited to 'src/mainboard/totalimpact') diff --git a/src/mainboard/totalimpact/briq/Config.lb b/src/mainboard/totalimpact/briq/Config.lb index 1a1c66c5a0..6c54d85120 100644 --- a/src/mainboard/totalimpact/briq/Config.lb +++ b/src/mainboard/totalimpact/briq/Config.lb @@ -2,18 +2,29 @@ ## Config file for the Total Impact briQ ## -uses PCIC0_CFGADDR -uses PCIC0_CFGDATA +uses TTYS0_DIV uses TTYS0_BASE uses CONFIG_BRIQ_750FX uses CONFIG_BRIQ_7400 +uses ISA_IO_BASE +uses ISA_MEM_BASE +uses PCIC0_CFGADDR +uses PCIC0_CFGDATA +uses _IO_BASE ## -## Set PCI registers +## Set memory map ## -default PCIC0_CFGADDR=0xff508000 -default PCIC0_CFGDATA=0xff508010 +default ISA_IO_BASE=0x80000000 +default ISA_MEM_BASE=0xc0000000 +default PCIC0_CFGADDR=0xff5f8000 +default PCIC0_CFGDATA=0xff5f8010 +default _IO_BASE=ISA_IO_BASE +## +## The briQ uses weird clocking, 4 = 115200 +## +default TTYS0_DIV=4 ## ## Set UART base address ## -- cgit v1.2.3