From 0f61a4fc98f135c0ed22c67ee3241bf5670a61e2 Mon Sep 17 00:00:00 2001 From: Myles Watson Date: Fri, 16 Oct 2009 16:32:57 +0000 Subject: Change CONFIG_LB_MEM_TOPK to CONFIG_RAMTOP to match CONFIG_RAMBASE. Signed-off-by: Myles Watson Acked-by: Peter Stuge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4788 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/tyan/s2912_fam10/Options.lb | 4 ++-- src/mainboard/tyan/s2912_fam10/apc_auto.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'src/mainboard/tyan/s2912_fam10') diff --git a/src/mainboard/tyan/s2912_fam10/Options.lb b/src/mainboard/tyan/s2912_fam10/Options.lb index 61c647cb86..29e4f136e7 100644 --- a/src/mainboard/tyan/s2912_fam10/Options.lb +++ b/src/mainboard/tyan/s2912_fam10/Options.lb @@ -101,7 +101,7 @@ uses CONFIG_LIFT_BSP_APIC_ID uses CONFIG_PCI_64BIT_PREF_MEM -uses CONFIG_LB_MEM_TOPK +uses CONFIG_RAMTOP uses CONFIG_PCI_BUS_SEGN_BITS @@ -135,7 +135,7 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_FAILOVER_SIZE=0x01000 #more 1M for pgtbl -default CONFIG_LB_MEM_TOPK=16384 +default CONFIG_RAMTOP=16384*1024 ## ## Build code for the fallback boot diff --git a/src/mainboard/tyan/s2912_fam10/apc_auto.c b/src/mainboard/tyan/s2912_fam10/apc_auto.c index 8985b7affd..2600dd3b6b 100644 --- a/src/mainboard/tyan/s2912_fam10/apc_auto.c +++ b/src/mainboard/tyan/s2912_fam10/apc_auto.c @@ -76,7 +76,7 @@ void hardwaremain(int ret_addr) { struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE - struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM + struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM struct node_core_id id; -- cgit v1.2.3