From abc0c7791e18dbd97949a49016f9ebedb823ed84 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Tue, 5 Oct 2010 17:59:12 +0000 Subject: attached patch moves a couple more config flags out of romstage: CK804_USE_NIC, CK804_USE_ACI, CK804_NUM. MCP55_USE_NIC, MCP55_USE_ACI, MCP55_NUM. Signed-off-by: Patrick Georgi Signed-off-by: Myles Watson Acked-by: Myles Watson Acked-by: Pter Stuge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5912 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/tyan/s2891/romstage.c | 3 --- src/mainboard/tyan/s2895/romstage.c | 3 --- src/mainboard/tyan/s2912/Kconfig | 1 + src/mainboard/tyan/s2912/romstage.c | 3 --- src/mainboard/tyan/s2912_fam10/Kconfig | 1 + src/mainboard/tyan/s2912_fam10/romstage.c | 3 --- 6 files changed, 2 insertions(+), 12 deletions(-) (limited to 'src/mainboard/tyan') diff --git a/src/mainboard/tyan/s2891/romstage.c b/src/mainboard/tyan/s2891/romstage.c index 7270384c7f..ad8e9767dd 100644 --- a/src/mainboard/tyan/s2891/romstage.c +++ b/src/mainboard/tyan/s2891/romstage.c @@ -62,12 +62,9 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" -#define CK804_NUM 1 #include "southbridge/nvidia/ck804/ck804_early_setup_ss.h" #include "southbridge/nvidia/ck804/ck804_early_setup.c" - - #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/tyan/s2895/romstage.c b/src/mainboard/tyan/s2895/romstage.c index be170802b8..258e75f5fa 100644 --- a/src/mainboard/tyan/s2895/romstage.c +++ b/src/mainboard/tyan/s2895/romstage.c @@ -72,9 +72,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" -#define CK804_USE_NIC 1 -#define CK804_USE_ACI 1 - #include "southbridge/nvidia/ck804/ck804_early_setup_ss.h" //set GPIO to input mode diff --git a/src/mainboard/tyan/s2912/Kconfig b/src/mainboard/tyan/s2912/Kconfig index 9af6e8f05a..4bed46fc8e 100644 --- a/src/mainboard/tyan/s2912/Kconfig +++ b/src/mainboard/tyan/s2912/Kconfig @@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_AMD_AMDK8 select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select SOUTHBRIDGE_NVIDIA_MCP55 + select MCP55_USE_NIC select SUPERIO_WINBOND_W83627HF select HAVE_BUS_CONFIG select HAVE_OPTION_TABLE diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c index c7078bbb34..4f048e8a05 100644 --- a/src/mainboard/tyan/s2912/romstage.c +++ b/src/mainboard/tyan/s2912/romstage.c @@ -100,9 +100,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" -#define MCP55_NUM 1 -#define MCP55_USE_NIC 1 - #define MCP55_PCI_E_X_0 1 #define MCP55_MB_SETUP \ diff --git a/src/mainboard/tyan/s2912_fam10/Kconfig b/src/mainboard/tyan/s2912_fam10/Kconfig index 1f9ed0c3cd..55708f5a8d 100644 --- a/src/mainboard/tyan/s2912_fam10/Kconfig +++ b/src/mainboard/tyan/s2912_fam10/Kconfig @@ -8,6 +8,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select DIMM_REGISTERED select NORTHBRIDGE_AMD_AMDFAM10 select SOUTHBRIDGE_NVIDIA_MCP55 + select MCP55_USE_NIC select SUPERIO_WINBOND_W83627HF select HAVE_BUS_CONFIG select HAVE_OPTION_TABLE diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index d287dc4313..7094533b3c 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -89,9 +89,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/quadcore/quadcore.c" -#define MCP55_NUM 1 -#define MCP55_USE_NIC 1 - #define MCP55_PCI_E_X_0 1 #define MCP55_MB_SETUP \ -- cgit v1.2.3