From 88f55b2c12f94fd0451902ee2edc663f12e401f4 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Fri, 25 Sep 2009 18:43:02 +0000 Subject: some progress on kconfig: - northbridges are done - southbridges are done - Intel CPUs are done, with a design that the board only has to specify the socket it has, and the CPUs are pulled in automatically. There is some more cleanup possible in that area, but I'll do that later - a couple more mainboards compile: - intel/eagleheights - intel/jarrell - intel/mtarvon - intel/truxton - intel/xe7501devkit - sunw/ultra40 - supermicro/h8dme - tyan/s2850 - tyan/s2875 - via/epia - via/epia-cn - via/epia-m - via/epia-m700 - via/epia-n - via/pc2500e (PPC not considered, probably overlooked something) All of them only _build_, but some options are probably completely wrong. To be fixed later Signed-off-by: Patrick Georgi Acked-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4673 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/via/epia/Kconfig | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 src/mainboard/via/epia/Kconfig (limited to 'src/mainboard/via/epia/Kconfig') diff --git a/src/mainboard/via/epia/Kconfig b/src/mainboard/via/epia/Kconfig new file mode 100644 index 0000000000..2e7468e5a6 --- /dev/null +++ b/src/mainboard/via/epia/Kconfig @@ -0,0 +1,35 @@ +config BOARD_VIA_EPIA + bool "EPIA" + select ARCH_X86 + select CPU_VIA_C3 + select NORTHBRIDGE_VIA_VT8601 + select SOUTHBRIDGE_VIA_VT8231 + select SUPERIO_WINBOND_W83627HF + select HAVE_PIRQ_TABLE + help + VIA EPIA mainboard. + +config MAINBOARD_DIR + string + default via/epia + depends on BOARD_VIA_EPIA + +#config DCACHE_RAM_BASE +# hex +# default 0xffef0000 +# depends on BOARD_VIA_EPIA +# +#config DCACHE_RAM_SIZE +# hex +# default 0x8000 +# depends on BOARD_VIA_EPIA + +config MAINBOARD_PART_NUMBER + string + default "EPIA" + depends on BOARD_VIA_EPIA + +config RAMBASE + hex + default 0x4000 + depends on BOARD_VIA_EPIA -- cgit v1.2.3