From 15a462b662148b764f7b265717d231ddfd0947b0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sat, 4 Mar 2017 07:33:51 +0200 Subject: elmex/pcm205400: Switch away from AGESA_LEGACY_WRAPPER MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ib386b5d9ba636614016c3f9ac042fee43eac53f2 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/19150 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/mainboard/elmex/pcm205400/Kconfig | 1 - src/mainboard/elmex/pcm205400/OemCustomize.c | 14 +++++++------- 2 files changed, 7 insertions(+), 8 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/elmex/pcm205400/Kconfig b/src/mainboard/elmex/pcm205400/Kconfig index b2691f3cc5..edc6758e1d 100644 --- a/src/mainboard/elmex/pcm205400/Kconfig +++ b/src/mainboard/elmex/pcm205400/Kconfig @@ -29,7 +29,6 @@ if BOARD_ELMEX_PCM205400 || BOARD_ELMEX_PCM205401 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select AGESA_LEGACY_WRAPPER select CPU_AMD_AGESA_FAMILY14 select NORTHBRIDGE_AMD_AGESA_FAMILY14 select SOUTHBRIDGE_AMD_CIMX_SB800 diff --git a/src/mainboard/elmex/pcm205400/OemCustomize.c b/src/mainboard/elmex/pcm205400/OemCustomize.c index 825364ecbc..c0dceff5af 100644 --- a/src/mainboard/elmex/pcm205400/OemCustomize.c +++ b/src/mainboard/elmex/pcm205400/OemCustomize.c @@ -16,7 +16,7 @@ #include "PlatformGnbPcieComplex.h" #include -#include +#include #include #include @@ -36,7 +36,7 @@ * **/ -static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly) +void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly) { AGESA_STATUS Status; VOID *BrazosPcieComplexListPtr; @@ -132,7 +132,6 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = { InitEarly->GnbConfig.PcieComplexList = BrazosPcieComplexListPtr; InitEarly->GnbConfig.PsppPolicy = 0; - return AGESA_SUCCESS; } /*---------------------------------------------------------------------------------------- @@ -146,12 +145,13 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = { * is populated, AGESA will base its settings on the data from the table. Otherwise, it will * use its default conservative settings. */ -CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { +static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = { NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 2), NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 1), PSO_END }; -const struct OEM_HOOK OemCustomize = { - .InitEarly = OemInitEarly, -}; +void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost) +{ + InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)PlatformMemoryTable; +} -- cgit v1.2.3