From 242ea84b017b7f2812a4a1ba4b4996e5f1bb35ab Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Thu, 23 Nov 2017 21:23:44 +0100 Subject: intel: Replace msr(0x198) with msr(IA32_PERF_STATUS) Change-Id: I22241427d1405de2e2eb2b3cfb029f3ce2c8dace Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/22585 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/mainboard/intel/eagleheights/romstage.c | 2 +- src/mainboard/intel/mtarvon/romstage.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c index c254f17b7e..21313eb491 100644 --- a/src/mainboard/intel/eagleheights/romstage.c +++ b/src/mainboard/intel/eagleheights/romstage.c @@ -171,7 +171,7 @@ void mainboard_romstage_entry(unsigned long bist) * bits 47:32, where BUS_RATIO_MAX and VID_MAX * are encoded */ - msr = rdmsr(IA32_PERF_STS); + msr = rdmsr(IA32_PERF_STATUS); perf = msr.hi & 0x0000ffff; /* Write VID_MAX & BUS_RATIO_MAX to diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c index cb3e870043..13f425e1cf 100644 --- a/src/mainboard/intel/mtarvon/romstage.c +++ b/src/mainboard/intel/mtarvon/romstage.c @@ -100,7 +100,7 @@ void mainboard_romstage_entry(unsigned long bist) /* Set CPU frequency/voltage to maximum */ /* FIXME: move to Pentium M init code */ - msr = rdmsr(0x198); + msr = rdmsr(IA32_PERF_STATUS); perf = msr.hi & 0xffff; msr = rdmsr(0x199); msr.lo &= 0xffff0000; -- cgit v1.2.3