From 25962837baaa18c58635cd4eb82bba49a89b003b Mon Sep 17 00:00:00 2001
From: "Jonathan A. Kollasch" <jakllsch@kollasch.net>
Date: Tue, 10 Jul 2012 10:14:17 -0500
Subject: Lenovo X60: correct SDHCI write protect polarity

Change-Id: I916deffe2c692042f7e54c936902e77770ee69df
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/1205
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
---
 src/mainboard/lenovo/x60/mainboard.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

(limited to 'src/mainboard')

diff --git a/src/mainboard/lenovo/x60/mainboard.c b/src/mainboard/lenovo/x60/mainboard.c
index b45342a38e..453cf38119 100644
--- a/src/mainboard/lenovo/x60/mainboard.c
+++ b/src/mainboard/lenovo/x60/mainboard.c
@@ -29,6 +29,7 @@
 #include "chip.h"
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
+#include <device/pci_ids.h>
 #include <arch/io.h>
 #include <ec/lenovo/pmh7/pmh7.h>
 #include <ec/acpi/ec.h>
@@ -52,7 +53,7 @@ int get_cst_entries(acpi_cstate_t **entries)
 
 static void mainboard_enable(device_t dev)
 {
-	device_t dev0, idedev;
+	device_t dev0, idedev, sdhci_dev;
 	u8 defaults_loaded = 0;
 
 	ec_clr_bit(0x03, 2);
@@ -79,6 +80,19 @@ static void mainboard_enable(device_t dev)
 		ec_write(0x0c, 0x04);
 	}
 
+	/* Set SDHCI write protect polarity "SDWPPol" */
+	sdhci_dev = dev_find_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C822, 0);
+	if (sdhci_dev) {
+		if (pci_read_config8(sdhci_dev, 0xfa) != 0x20) {
+			/* unlock */
+			pci_write_config8(sdhci_dev, 0xf9, 0xfc);
+			/* set SDWPPol, keep CLKRUNDis, SDPWRPol clear */
+			pci_write_config8(sdhci_dev, 0xfa, 0x20);
+			/* restore lock */
+			pci_write_config8(sdhci_dev, 0xf9, 0x00);
+		}
+	}
+
 	if (get_option(&defaults_loaded, "cmos_defaults_loaded") < 0) {
 		printk(BIOS_INFO, "failed to get cmos_defaults_loaded");
 		defaults_loaded = 0;
-- 
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