From 30fbb4c23e7b867c707d61520c05cc4c6c17e174 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 20 Oct 2014 07:04:55 +0300 Subject: AGESA boards: Fix early agesawrapper_amdinitmmio() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Regression introduced with commit 7b23ae0 AGESA: Trace execution with AGESAWRAPPER() As the call is made before console_init() is called it must not call any printk(). Debugging Olivehill and Parmer platforms using a custom FPGA (as these boards have no Super-IO UART) have been observed to halt and/or delay at early boot. Change-Id: I3ab4e5378db44aece9046c8636cde1053ce5390d Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/7059 Reviewed-by: Edward O'Callaghan Tested-by: build bot (Jenkins) Reviewed-by: WANG Siyuan --- src/mainboard/amd/olivehill/romstage.c | 2 +- src/mainboard/amd/olivehillplus/romstage.c | 10 +--------- src/mainboard/amd/parmer/romstage.c | 3 ++- src/mainboard/amd/thatcher/romstage.c | 2 +- src/mainboard/amd/torpedo/romstage.c | 2 +- src/mainboard/asrock/imb-a180/romstage.c | 2 +- src/mainboard/asus/f2a85-m/romstage.c | 2 +- src/mainboard/hp/pavilion_m6_1035dx/romstage.c | 2 +- src/mainboard/supermicro/h8qgi/romstage.c | 2 +- src/mainboard/supermicro/h8scm/romstage.c | 2 +- src/mainboard/tyan/s8226/romstage.c | 2 +- 11 files changed, 12 insertions(+), 19 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/amd/olivehill/romstage.c b/src/mainboard/amd/olivehill/romstage.c index 326a41ab8c..4c1b18e6f4 100644 --- a/src/mainboard/amd/olivehill/romstage.c +++ b/src/mainboard/amd/olivehill/romstage.c @@ -51,7 +51,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) outb(0xD2, 0xcd6); outb(0x00, 0xcd7); - AGESAWRAPPER(amdinitmmio); + AGESAWRAPPER_PRE_CONSOLE(amdinitmmio); hudson_lpc_port80(); diff --git a/src/mainboard/amd/olivehillplus/romstage.c b/src/mainboard/amd/olivehillplus/romstage.c index 88f1163844..6f300ce6fd 100644 --- a/src/mainboard/amd/olivehillplus/romstage.c +++ b/src/mainboard/amd/olivehillplus/romstage.c @@ -41,7 +41,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { u32 val; volatile int halt = 0; - AGESA_STATUS status = AGESA_UNSUPPORTED; /* * In Hudson RRG, PMIOxD2[5:4] is "Drive strength control for @@ -54,14 +53,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) outb(0xD2, 0xcd6); outb(0x00, 0xcd7); - /* - * The following should be a call to AGESAWRAPPER() macro, but - * that would use console output before it is initialized. - */ - status = agesawrapper_amdinitmmio(); - if (AGESA_SUCCESS != status) { - printk(BIOS_WARNING, "AmdInitMmio reported %s\n", decodeAGESA_STATUS(status)); - } + AGESAWRAPPER_PRE_CONSOLE(amdinitmmio); hudson_lpc_port80(); diff --git a/src/mainboard/amd/parmer/romstage.c b/src/mainboard/amd/parmer/romstage.c index 7c143f4fde..7aa246cc04 100644 --- a/src/mainboard/amd/parmer/romstage.c +++ b/src/mainboard/amd/parmer/romstage.c @@ -42,7 +42,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { u32 val; - AGESAWRAPPER(amdinitmmio); + + AGESAWRAPPER_PRE_CONSOLE(amdinitmmio); hudson_lpc_port80(); diff --git a/src/mainboard/amd/thatcher/romstage.c b/src/mainboard/amd/thatcher/romstage.c index 8ee42bd5e4..cc978663b3 100644 --- a/src/mainboard/amd/thatcher/romstage.c +++ b/src/mainboard/amd/thatcher/romstage.c @@ -47,7 +47,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) u32 val; u8 byte; device_t dev; - AGESAWRAPPER(amdinitmmio); + AGESAWRAPPER_PRE_CONSOLE(amdinitmmio); hudson_lpc_port80(); //__asm__ volatile ("1: jmp 1b"); diff --git a/src/mainboard/amd/torpedo/romstage.c b/src/mainboard/amd/torpedo/romstage.c index 7ed520a9bc..1b12f73330 100644 --- a/src/mainboard/amd/torpedo/romstage.c +++ b/src/mainboard/amd/torpedo/romstage.c @@ -45,7 +45,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) u32 val; post_code(0x35); - AGESAWRAPPER(amdinitmmio); + AGESAWRAPPER_PRE_CONSOLE(amdinitmmio); if (!cpu_init_detectedx && boot_cpu()) { post_code(0x30); diff --git a/src/mainboard/asrock/imb-a180/romstage.c b/src/mainboard/asrock/imb-a180/romstage.c index 37f14f6c39..cabcde836d 100644 --- a/src/mainboard/asrock/imb-a180/romstage.c +++ b/src/mainboard/asrock/imb-a180/romstage.c @@ -56,7 +56,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) //outb(0xD2, 0xcd6); //outb(0x00, 0xcd7); - AGESAWRAPPER(amdinitmmio); + AGESAWRAPPER_PRE_CONSOLE(amdinitmmio); hudson_lpc_port80(); diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c index bdf03a7fc6..caa32caa72 100644 --- a/src/mainboard/asus/f2a85-m/romstage.c +++ b/src/mainboard/asus/f2a85-m/romstage.c @@ -76,7 +76,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) hudson_lpc_port80(); #endif - AGESAWRAPPER(amdinitmmio); + AGESAWRAPPER_PRE_CONSOLE(amdinitmmio); if (!cpu_init_detectedx && boot_cpu()) { diff --git a/src/mainboard/hp/pavilion_m6_1035dx/romstage.c b/src/mainboard/hp/pavilion_m6_1035dx/romstage.c index ea848b4b86..01f463a0cb 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/romstage.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/romstage.c @@ -39,7 +39,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { u32 val; - AGESAWRAPPER(amdinitmmio); + AGESAWRAPPER_PRE_CONSOLE(amdinitmmio); hudson_lpc_port80(); diff --git a/src/mainboard/supermicro/h8qgi/romstage.c b/src/mainboard/supermicro/h8qgi/romstage.c index 425f677c18..bd358c991e 100644 --- a/src/mainboard/supermicro/h8qgi/romstage.c +++ b/src/mainboard/supermicro/h8qgi/romstage.c @@ -46,7 +46,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) u32 val; post_code(0x30); - agesawrapper_amdinitmmio(); + AGESAWRAPPER_PRE_CONSOLE(amdinitmmio); post_code(0x31); /* Halt if there was a built in self test failure */ diff --git a/src/mainboard/supermicro/h8scm/romstage.c b/src/mainboard/supermicro/h8scm/romstage.c index da92d97934..1b642c4d39 100644 --- a/src/mainboard/supermicro/h8scm/romstage.c +++ b/src/mainboard/supermicro/h8scm/romstage.c @@ -45,7 +45,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) u32 val; post_code(0x30); - agesawrapper_amdinitmmio(); + AGESAWRAPPER_PRE_CONSOLE(amdinitmmio); post_code(0x31); /* Halt if there was a built in self test failure */ diff --git a/src/mainboard/tyan/s8226/romstage.c b/src/mainboard/tyan/s8226/romstage.c index dc3bde21c4..bbeabbc72a 100644 --- a/src/mainboard/tyan/s8226/romstage.c +++ b/src/mainboard/tyan/s8226/romstage.c @@ -44,7 +44,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) u32 val; post_code(0x30); - agesawrapper_amdinitmmio(); + AGESAWRAPPER_PRE_CONSOLE(amdinitmmio); post_code(0x31); /* Halt if there was a built in self test failure */ -- cgit v1.2.3