From 5ef051a53a03d537b6feab4e85edb69835eb6998 Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Fri, 29 Apr 2016 15:16:54 -0700 Subject: soc/intel/quark: Add PCIe reset support Migrate PCIe reset from PlatformPciHelperLib in QuarkFspPkg into coreboot. Change-Id: I1c33fa16b0323091e8f9bd503bbfdb8a253a76d4 Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/14944 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/mainboard/intel/galileo/gen1.h | 3 +++ src/mainboard/intel/galileo/gen2.h | 3 +++ src/mainboard/intel/galileo/gpio.c | 17 +++++++++++++++++ 3 files changed, 23 insertions(+) (limited to 'src/mainboard') diff --git a/src/mainboard/intel/galileo/gen1.h b/src/mainboard/intel/galileo/gen1.h index 26335dad61..e1e8f59070 100644 --- a/src/mainboard/intel/galileo/gen1.h +++ b/src/mainboard/intel/galileo/gen1.h @@ -13,6 +13,9 @@ * GNU General Public License for more details. */ +/* PCIe reset pin */ +#define GEN1_PCI_RESET_RESUMEWELL_GPIO 3 + /* Jumper J2 determines the slave address of Cypress I/O GPIO expander */ #define GALILEO_DETERMINE_IOEXP_SLA_RESUMEWELL_GPIO 5 diff --git a/src/mainboard/intel/galileo/gen2.h b/src/mainboard/intel/galileo/gen2.h index 108971b8ba..8eee744392 100644 --- a/src/mainboard/intel/galileo/gen2.h +++ b/src/mainboard/intel/galileo/gen2.h @@ -13,6 +13,9 @@ * GNU General Public License for more details. */ +/* PCIe reset pin */ +#define GEN2_PCI_RESET_RESUMEWELL_GPIO 0 + static const struct reg_script gen2_gpio_init[] = { /* Initialize the legacy GPIO controller */ REG_LEG_GPIO_WRITE(R_QNC_GPIO_CGEN_CORE_WELL, 0x03), diff --git a/src/mainboard/intel/galileo/gpio.c b/src/mainboard/intel/galileo/gpio.c index a411c5a0ff..31843814c2 100644 --- a/src/mainboard/intel/galileo/gpio.c +++ b/src/mainboard/intel/galileo/gpio.c @@ -50,3 +50,20 @@ void mainboard_gpio_init(void) script = gen1_gpio_init; reg_script_run(script); } + +void mainboard_gpio_pcie_reset(uint32_t pin_value) +{ + uint32_t pin_number; + uint32_t value; + + /* Determine the correct PCIe reset pin */ + if (IS_ENABLED(CONFIG_GALILEO_GEN2)) + pin_number = GEN2_PCI_RESET_RESUMEWELL_GPIO; + else + pin_number = GEN1_PCI_RESET_RESUMEWELL_GPIO; + + /* Update the PCIe reset value */ + value = reg_legacy_gpio_read(R_QNC_GPIO_RGLVL_RESUME_WELL); + value = (value & ~(1 << pin_number)) | ((pin_value & 1) << pin_number); + reg_legacy_gpio_write(R_QNC_GPIO_RGLVL_RESUME_WELL, value); +} -- cgit v1.2.3