From 5f9c6734fc9bbe69c007c46c8ec6f314bd5522a8 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Wed, 28 Jun 2017 16:42:51 +0200 Subject: lib/spd_bin: Use proper I2C addresses Use the plain address instead of the weird shifted encoding (e.g. if we'd use `0xa0` as address, it's actually `0x50` encoded into a write command). Change-Id: I6febb2e04e1c6de4294dfa37bde16b147a80b7a8 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/20405 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Furquan Shaikh --- src/mainboard/google/fizz/romstage.c | 2 +- src/mainboard/intel/kblrvp/romstage.c | 2 +- src/mainboard/purism/librem13v2/romstage.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/google/fizz/romstage.c b/src/mainboard/google/fizz/romstage.c index 4c816df55f..065ecd3a8a 100644 --- a/src/mainboard/google/fizz/romstage.c +++ b/src/mainboard/google/fizz/romstage.c @@ -32,7 +32,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) /* Read spd block to get memory config */ struct spd_block blk = { - .addr_map = { 0xa0, 0xa4, }, + .addr_map = { 0x50, 0x52, }, }; mem_cfg->DqPinsInterleaved = 1; get_spd_smbus(&blk); diff --git a/src/mainboard/intel/kblrvp/romstage.c b/src/mainboard/intel/kblrvp/romstage.c index 9082254385..7bfbe1c744 100644 --- a/src/mainboard/intel/kblrvp/romstage.c +++ b/src/mainboard/intel/kblrvp/romstage.c @@ -51,7 +51,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) mem_cfg->MemorySpdPtr00 = (uintptr_t)rdev_mmap_full(&spd_rdev); } else { /* for CONFIG_BOARD_INTEL_KBLRVP7 */ struct spd_block blk = { - .addr_map = { 0xa0, 0xa2, 0xa4, 0xa6, }, + .addr_map = { 0x50, 0x51, 0x52, 0x53, }, }; mem_cfg->DqPinsInterleaved = 1; diff --git a/src/mainboard/purism/librem13v2/romstage.c b/src/mainboard/purism/librem13v2/romstage.c index bd5520a7c4..c8c3cd9510 100644 --- a/src/mainboard/purism/librem13v2/romstage.c +++ b/src/mainboard/purism/librem13v2/romstage.c @@ -35,7 +35,7 @@ void mainboard_memory_init_params(struct romstage_params *params, MEMORY_INIT_UPD *memory_params) { struct spd_block blk = { - .addr_map = { 0xa0 }, + .addr_map = { 0x50 }, }; memory_params->DqPinsInterleaved = 1; -- cgit v1.2.3