From 7bfdf5be6397713f776f0a98c2ebcd9340632195 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Mon, 4 Feb 2019 15:22:01 +0100 Subject: src/mainboard/pcengines/apu2/OemCustomize.c: Enable CPB feature MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Enable Core Performance Boost feature in automatic mode. Also enable C6 state which is a dependency for proper CPB operation. CPB allows to raise single core frequency from 1000MHz to 1400MHz during high load if other cores idle. The processor has additional boosted P-states when CPB is enabled, but these are hidden from OS. TEST: Higher single-core CPU performance is indicated by increased memory bandwidth as reported by memtest86+. Signed-off-by: Michał Żygowski Change-Id: I5e080bfaee06fd13cedf5151d4a598ec212213f2 Reviewed-on: https://review.coreboot.org/c/31229 Reviewed-by: Kyösti Mälkki Reviewed-by: Felix Held Tested-by: build bot (Jenkins) --- src/mainboard/pcengines/apu2/OemCustomize.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/mainboard') diff --git a/src/mainboard/pcengines/apu2/OemCustomize.c b/src/mainboard/pcengines/apu2/OemCustomize.c index a729860616..700f4c7ca6 100644 --- a/src/mainboard/pcengines/apu2/OemCustomize.c +++ b/src/mainboard/pcengines/apu2/OemCustomize.c @@ -97,4 +97,6 @@ OemCustomizeInitEarly ( ) { InitEarly->GnbConfig.PcieComplexList = &PcieComplex; + InitEarly->PlatformConfig.CStateMode = CStateModeC6; + InitEarly->PlatformConfig.CpbMode = CpbModeAuto; } -- cgit v1.2.3