From 9f78127b61632cbb138bdbfa650c2e9965440d3b Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sat, 25 Jul 2020 14:03:40 +0200 Subject: lynxpoint: Factor out PIRQ routing from devicetree All boards disable PIRQs. They aren't used on modern OSes anyway. Change-Id: I1351fd4a3910e8cf2e9afe51dc2e82c7464de403 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/43863 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/mainboard/asrock/b85m_pro4/devicetree.cb | 8 -------- src/mainboard/asrock/h81m-hds/devicetree.cb | 9 --------- src/mainboard/google/beltino/devicetree.cb | 9 --------- src/mainboard/google/slippy/devicetree.cb | 9 --------- src/mainboard/intel/baskingridge/devicetree.cb | 9 --------- src/mainboard/lenovo/t440p/devicetree.cb | 8 -------- src/mainboard/supermicro/x10slm-f/devicetree.cb | 9 --------- 7 files changed, 61 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/asrock/b85m_pro4/devicetree.cb b/src/mainboard/asrock/b85m_pro4/devicetree.cb index b724652ea6..106df54e01 100644 --- a/src/mainboard/asrock/b85m_pro4/devicetree.cb +++ b/src/mainboard/asrock/b85m_pro4/devicetree.cb @@ -27,14 +27,6 @@ chip northbridge/intel/haswell chip southbridge/intel/lynxpoint register "gen1_dec" = "0x000c0291" # Super I/O HWM - register "pirqa_routing" = "0x80" - register "pirqb_routing" = "0x80" - register "pirqc_routing" = "0x80" - register "pirqd_routing" = "0x80" - register "pirqe_routing" = "0x80" - register "pirqf_routing" = "0x80" - register "pirqg_routing" = "0x80" - register "pirqh_routing" = "0x80" register "sata_ahci" = "1" register "sata_port_map" = "0x3f" diff --git a/src/mainboard/asrock/h81m-hds/devicetree.cb b/src/mainboard/asrock/h81m-hds/devicetree.cb index 561c1e35d5..8f368961de 100644 --- a/src/mainboard/asrock/h81m-hds/devicetree.cb +++ b/src/mainboard/asrock/h81m-hds/devicetree.cb @@ -35,15 +35,6 @@ chip northbridge/intel/haswell end chip southbridge/intel/lynxpoint - register "pirqa_routing" = "0x80" - register "pirqb_routing" = "0x80" - register "pirqc_routing" = "0x80" - register "pirqd_routing" = "0x80" - register "pirqe_routing" = "0x80" - register "pirqf_routing" = "0x80" - register "pirqg_routing" = "0x80" - register "pirqh_routing" = "0x80" - register "sata_ahci" = "1" register "sata_port_map" = "0x33" diff --git a/src/mainboard/google/beltino/devicetree.cb b/src/mainboard/google/beltino/devicetree.cb index 171b93f81d..8fdfbd79a0 100644 --- a/src/mainboard/google/beltino/devicetree.cb +++ b/src/mainboard/google/beltino/devicetree.cb @@ -36,15 +36,6 @@ chip northbridge/intel/haswell device pci 03.0 on end # mini-hd audio chip southbridge/intel/lynxpoint - register "pirqa_routing" = "0x80" - register "pirqb_routing" = "0x80" - register "pirqc_routing" = "0x80" - register "pirqd_routing" = "0x80" - register "pirqe_routing" = "0x80" - register "pirqf_routing" = "0x80" - register "pirqg_routing" = "0x80" - register "pirqh_routing" = "0x80" - # SuperIO range is 0x700-0x73f register "gen2_dec" = "0x003c0701" diff --git a/src/mainboard/google/slippy/devicetree.cb b/src/mainboard/google/slippy/devicetree.cb index bbb22ca9f0..200721b8ef 100644 --- a/src/mainboard/google/slippy/devicetree.cb +++ b/src/mainboard/google/slippy/devicetree.cb @@ -40,15 +40,6 @@ chip northbridge/intel/haswell device pci 03.0 on end # mini-hd audio chip southbridge/intel/lynxpoint - register "pirqa_routing" = "0x80" - register "pirqb_routing" = "0x80" - register "pirqc_routing" = "0x80" - register "pirqd_routing" = "0x80" - register "pirqe_routing" = "0x80" - register "pirqf_routing" = "0x80" - register "pirqg_routing" = "0x80" - register "pirqh_routing" = "0x80" - # EC range is 0x800-0x9ff register "gen1_dec" = "0x00fc0801" register "gen2_dec" = "0x00fc0901" diff --git a/src/mainboard/intel/baskingridge/devicetree.cb b/src/mainboard/intel/baskingridge/devicetree.cb index 8ea8e97c61..6345090c7a 100644 --- a/src/mainboard/intel/baskingridge/devicetree.cb +++ b/src/mainboard/intel/baskingridge/devicetree.cb @@ -32,15 +32,6 @@ chip northbridge/intel/haswell device pci 02.0 on end # vga controller chip southbridge/intel/lynxpoint # Intel Series 8 Lynx Point PCH - register "pirqa_routing" = "0x80" - register "pirqb_routing" = "0x80" - register "pirqc_routing" = "0x80" - register "pirqd_routing" = "0x80" - register "pirqe_routing" = "0x80" - register "pirqf_routing" = "0x80" - register "pirqg_routing" = "0x80" - register "pirqh_routing" = "0x80" - # GPI routing # 0 No effect (default) # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) diff --git a/src/mainboard/lenovo/t440p/devicetree.cb b/src/mainboard/lenovo/t440p/devicetree.cb index e8f8a1a396..60728c496c 100644 --- a/src/mainboard/lenovo/t440p/devicetree.cb +++ b/src/mainboard/lenovo/t440p/devicetree.cb @@ -38,14 +38,6 @@ chip northbridge/intel/haswell register "gen4_dec" = "0x000c06a1" register "gpi13_routing" = "2" register "gpi1_routing" = "2" - register "pirqa_routing" = "0x80" - register "pirqb_routing" = "0x80" - register "pirqc_routing" = "0x80" - register "pirqd_routing" = "0x80" - register "pirqe_routing" = "0x80" - register "pirqf_routing" = "0x80" - register "pirqg_routing" = "0x80" - register "pirqh_routing" = "0x80" register "sata_ahci" = "1" # 0(HDD), 1(M.2), 5(ODD) register "sata_port_map" = "0x23" diff --git a/src/mainboard/supermicro/x10slm-f/devicetree.cb b/src/mainboard/supermicro/x10slm-f/devicetree.cb index 80e79d8682..ffcc56d15c 100644 --- a/src/mainboard/supermicro/x10slm-f/devicetree.cb +++ b/src/mainboard/supermicro/x10slm-f/devicetree.cb @@ -26,15 +26,6 @@ chip northbridge/intel/haswell device pci 03.0 off end # Mini-HD audio chip southbridge/intel/lynxpoint - register "pirqa_routing" = "0x80" - register "pirqb_routing" = "0x80" - register "pirqc_routing" = "0x80" - register "pirqd_routing" = "0x80" - register "pirqe_routing" = "0x80" - register "pirqf_routing" = "0x80" - register "pirqg_routing" = "0x80" - register "pirqh_routing" = "0x80" - register "sata_ahci" = "1" register "sata_port_map" = "0x3f" -- cgit v1.2.3