From c8fa51b8770a81f15a1bb9f609420436928f3244 Mon Sep 17 00:00:00 2001 From: Shiyu Sun Date: Fri, 12 Jun 2020 02:41:30 +1000 Subject: mb/google/puff: add MST and LSPCON details to devicetree Added device hid info to the MST and LSPCON devices. BRANCH=None BUG=b:156546414 TEST=Manual tested and able to see update on sysfs and ssdt table Signed-off-by: Shiyu Sun Change-Id: Iaef6c08f241ea671d1487a8524162dbb438b8e98 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42300 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan Reviewed-by: Paul Menzel --- .../google/hatch/variants/puff/overridetree.cb | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/google/hatch/variants/puff/overridetree.cb b/src/mainboard/google/hatch/variants/puff/overridetree.cb index ea6e177024..ededac42ed 100644 --- a/src/mainboard/google/hatch/variants/puff/overridetree.cb +++ b/src/mainboard/google/hatch/variants/puff/overridetree.cb @@ -280,8 +280,22 @@ chip soc/intel/cannonlake # RFU - Reserved for Future Use. end # I2C #0 device pci 15.1 off end # I2C #1 - device pci 15.2 on end # I2C #2, PCON PS175. - device pci 15.3 on end # I2C #3, Realtek RTD2142. + device pci 15.2 on + chip drivers/i2c/generic + register "hid" = ""1AF80175"" + register "name" = ""PS17"" + register "desc" = ""Parade PS175"" + device i2c 4a on end + end + end # I2C #2, PCON PS175. + device pci 15.3 on + chip drivers/i2c/generic + register "hid" = ""10EC2142"" + register "name" = ""RTD2"" + register "desc" = ""Realtek RTD2142"" + device i2c 4a on end + end + end # I2C #3, Realtek RTD2142. device pci 19.0 on chip drivers/i2c/generic register "hid" = ""10EC5682"" -- cgit v1.2.3