From ce801b55fa21f119f19f39eacc15d8b63e639890 Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Fri, 5 Apr 2013 09:56:18 -0700 Subject: exynos5-common: get rid of displayport trial code This was a first pass at display port support, we have realized that it was ultimately a bad path. The display hardware is intimately tied into a specific cpu and mainboard combination, and the code has to be elsewhere. The devicetree formatting is ugly, but it matters not: it's changing soon. Change-Id: Iddce54f9e7219a7569315565fac65afbbe0edd29 Signed-off-by: Ronald G. Minnich Reviewed-on: http://review.coreboot.org/3029 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/google/snow/devicetree.cb | 14 -------------- 1 file changed, 14 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/google/snow/devicetree.cb b/src/mainboard/google/snow/devicetree.cb index 5ad786ef55..4c88ea8e98 100644 --- a/src/mainboard/google/snow/devicetree.cb +++ b/src/mainboard/google/snow/devicetree.cb @@ -28,19 +28,5 @@ device domain 0 on device i2c 6 on end # ? device i2c 9 on end # ? end - chip cpu/samsung/exynos5-common/displayport - register "xres" = "1366" - register "yres" = "768" - register "bpp" = "16" - # complex magic timing! - register "clkval_f" = "2" - register "upper_margin" = "14" - register "lower_margin" = "3" - register "vsync" = "5" - register "left_margin" = "80" - register "right_margin" = "48" - register "hsync" = "32" - register "lcdbase" = "0x10000000" - end end end -- cgit v1.2.3