From d742d02fe2fff0446d62d0430e1d1ba2b88cbf0a Mon Sep 17 00:00:00 2001 From: Sridhar Siricilla Date: Fri, 16 Apr 2021 13:08:38 +0530 Subject: mb/intel/shadowmountain: Enable HECI1 interface The patch enables HECI1 interface Signed-off-by: Sridhar Siricilla Change-Id: Ia2638559bcaac78d024e35abd09534b61eacb843 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52411 Tested-by: build bot (Jenkins) Reviewed-by: Rizwan Qureshi Reviewed-by: V Sowmya --- src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard') diff --git a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb index 7b0edadccb..beaf8fd1ec 100644 --- a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb @@ -268,7 +268,7 @@ chip soc/intel/alderlake end end # I2C2 device pci 15.3 on end # I2C3 - device pci 16.0 off end # HECI1 + device pci 16.0 on end # HECI1 device pci 16.1 off end # HECI2 device pci 16.2 off end # CSME device pci 16.3 off end # CSME -- cgit v1.2.3