From de690a30a4c5c9f22dec0c606a82cf10216ecaf7 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 25 Jul 2018 11:43:19 +0200 Subject: asrock/g41c-gs: make serial console setup depend on selected super IO The used super IO is selected in Kconfig depending on the board variant, so use the selected super IO instead of the board variant directly. Change-Id: I8421e7c9b1f9ca875c9291f4105c3c20726adfd0 Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/27629 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Paul Menzel --- src/mainboard/asrock/g41c-gs/romstage.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/asrock/g41c-gs/romstage.c b/src/mainboard/asrock/g41c-gs/romstage.c index e1f4152a4d..49a44d9685 100644 --- a/src/mainboard/asrock/g41c-gs/romstage.c +++ b/src/mainboard/asrock/g41c-gs/romstage.c @@ -47,7 +47,7 @@ static void mb_lpc_setup(void) setup_pch_gpios(&mainboard_gpio_map); /* Set GPIOs on superio, enable UART */ - if (IS_ENABLED(CONFIG_BOARD_ASROCK_G41C_GS_R2_0)) { + if (IS_ENABLED(CONFIG_SUPERIO_NUVOTON_NCT6776)) { nuvoton_pnp_enter_conf_state(SERIAL_DEV_R2); pnp_set_logical_device(SERIAL_DEV_R2); @@ -57,7 +57,7 @@ static void mb_lpc_setup(void) nuvoton_pnp_exit_conf_state(SERIAL_DEV_R2); nuvoton_enable_serial(SERIAL_DEV_R2, CONFIG_TTYS0_BASE); - } else { /* BOARD_ASROCK_G41C_GS */ + } else { winbond_enable_serial(SERIAL_DEV_R1, CONFIG_TTYS0_BASE); } /* IRQ routing */ -- cgit v1.2.3