From e30db0e37034f6698eced00727b6ad0ba3fc5c7b Mon Sep 17 00:00:00 2001 From: Edwin Beasant Date: Tue, 9 Feb 2010 10:22:33 +0000 Subject: Port of CS5536 early UART setup from v3. Permit early setup of COM2 Signed-off-by: Edwin Beasant Acked-by: Patrick Georgi git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/amd/norwich/romstage.c | 2 +- src/mainboard/olpc/btest/romstage.c | 2 +- src/mainboard/olpc/rev_a/romstage.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/amd/norwich/romstage.c b/src/mainboard/amd/norwich/romstage.c index fc7e96b342..19c5b17ade 100644 --- a/src/mainboard/amd/norwich/romstage.c +++ b/src/mainboard/amd/norwich/romstage.c @@ -115,7 +115,7 @@ void cache_as_ram_main(void) * up later... */ /* If debug. real setup done in chipset init via Config.lb. */ - cs5536_setup_onchipuart(); + cs5536_setup_onchipuart(1); mb_gpio_init(); uart_init(); console_init(); diff --git a/src/mainboard/olpc/btest/romstage.c b/src/mainboard/olpc/btest/romstage.c index 21363b7199..fa75b20c1d 100644 --- a/src/mainboard/olpc/btest/romstage.c +++ b/src/mainboard/olpc/btest/romstage.c @@ -177,7 +177,7 @@ static void main(unsigned long bist) * it is counting on some early MSR setup * for cs5536 */ - cs5536_setup_onchipuart(); + cs5536_setup_onchipuart(1); gpio_init(); uart_init(); console_init(); diff --git a/src/mainboard/olpc/rev_a/romstage.c b/src/mainboard/olpc/rev_a/romstage.c index 21363b7199..fa75b20c1d 100644 --- a/src/mainboard/olpc/rev_a/romstage.c +++ b/src/mainboard/olpc/rev_a/romstage.c @@ -177,7 +177,7 @@ static void main(unsigned long bist) * it is counting on some early MSR setup * for cs5536 */ - cs5536_setup_onchipuart(); + cs5536_setup_onchipuart(1); gpio_init(); uart_init(); console_init(); -- cgit v1.2.3