From e87d3cdf59e6457e04158715789066d47d6e30e0 Mon Sep 17 00:00:00 2001 From: Shelley Chen Date: Fri, 26 Jan 2018 12:50:54 -0800 Subject: google/fizz: Adjust PL2 and PsysPl2 values for power loss Set PsysPl2 values to 90% of max adapter power for all types of adapters (typeC and barrel jack) to account for a 10% power loss from the adapter to the soc. BUG=b:71594855 BRANCH=None TEST=reboot device and make sure Pl2 and PsysPl2 MSRs are properly set with iotools rdmsr command on both U42 and U22 skus with both typeC and barrel jack power adapters. Change-Id: I8425c6d4d669449eccb9324ff58ff6d1662c5c43 Signed-off-by: Shelley Chen Reviewed-on: https://review.coreboot.org/23457 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Furquan Shaikh --- src/mainboard/google/fizz/mainboard.c | 50 +++++++++++++++++++++-------------- 1 file changed, 30 insertions(+), 20 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/google/fizz/mainboard.c b/src/mainboard/google/fizz/mainboard.c index 4e7f3165dc..3a8aa5420f 100644 --- a/src/mainboard/google/fizz/mainboard.c +++ b/src/mainboard/google/fizz/mainboard.c @@ -43,7 +43,7 @@ * For type-C chargers, set PL2 to 90% of max power to account for * cable loss and FET Rdson loss in the path from the source. */ -#define GET_TYPEC_PL2(w) (9 * (w) / 10) +#define SET_PSYSPL2(w) (9 * (w) / 10) #define OEM_ID_COUNT 3 #define SKU_ID_COUNT 7 @@ -108,17 +108,26 @@ static uint8_t board_sku_id(void) * * Set Pl2 and SysPl2 values based on detected charger. * If detected barrel jack, use values below based on SKU. - * +-------------+-----+---------+-------------------+ - * | sku_id | PL2 | PsysPL2 | Pmax (Prop = 48W) | - * +-------------+-----+---------+-------------------+ - * | i7 U42 | 44 | 90 | 119 | - * | i5 U42 | 44 | 90 | 119 | - * | i3 U42 | 44 | 90 | 119 | - * | i7 U22 | 29 | 65 | 91 | - * | i5 U22 | 29 | 65 | 91 | - * | i3 U22 | 29 | 65 | 91 | - * | celeron U22 | 29 | 65 | 91 | - * +-------------+-----+---------+-------------------+ + * +-------------+-----+---------+-----+------+------+ + * | sku_id | PL2 | PsysPL2 | PL4 | Pmax | Prop | + * +-------------+-----+---------+-----+------+------+ + * | i7 U42 | 44 | 81 | 71 | 120 | 48 | + * | i5 U42 | 44 | 81 | 71 | 120 | 48 | + * | i3 U42 | 44 | 81 | 71 | 120 | 48 | + * | i7 U22 | 29 | 58 | 43 | 91 | 48 | + * | i5 U22 | 29 | 58 | 43 | 91 | 48 | + * | i3 U22 | 29 | 58 | 43 | 91 | 48 | + * | celeron U22 | 29 | 58 | 43 | 91 | 48 | + * +-------------+-----+---------+-----+------+------+ + * For USB C charger: + * +-------------+-----+---------+-----+------+------+ + * | Max Power(W)| PL2 | PsysPL2 | PL4 | Pmax | Prop | + * +-------------+-----+---------+-----+------+------+ + * | 60 (U42) | 44 | 54 | 54 | 120 | 48 | + * | 60 (U22) | 29 | 54 | 43 | 91 | 48 | + * | X (U42) | 44 | .9X | .9X | 120 | 48 | + * | X (U22) | 29 | .9X | .9X | 91 | 48 | + * +-------------+-----+---------+-----+------+------+ */ static void mainboard_set_power_limits(u32 *pl2_val, u32 *psyspl2_val) { @@ -131,25 +140,26 @@ static void mainboard_set_power_limits(u32 *pl2_val, u32 *psyspl2_val) (1 << FIZZ_SKU_ID_I5_U42) | (1 << FIZZ_SKU_ID_I3_U42); + /* PL2 value is sku-based, no matter what charger we are using */ + pl2 = FIZZ_PL2_U22; + if ((1 << sku) & u42_mask) + pl2 = FIZZ_PL2_U42; + /* If we can't get charger info or not PD charger, assume barrel jack */ if (rv != 0 || type != USB_CHG_TYPE_PD) { - /* using the barrel jack, get PL2 based on sku id */ - pl2 = FIZZ_PL2_U22; + /* using the barrel jack, get PsysPL2 based on sku id */ psyspl2 = FIZZ_PSYSPL2_U22; /* Running a U42 SKU */ - if ((1 << sku) & u42_mask) { - pl2 = FIZZ_PL2_U42; + if ((1 << sku) & u42_mask) psyspl2 = FIZZ_PSYSPL2_U42; - } - } else { /* Base on max value of adapter */ - pl2 = GET_TYPEC_PL2(watts); psyspl2 = watts; } *pl2_val = pl2; - *psyspl2_val = psyspl2; + /* set psyspl2 to 90% of max adapter power */ + *psyspl2_val = SET_PSYSPL2(psyspl2); } static uint8_t board_oem_id(void) -- cgit v1.2.3