From 113f670baabab0776e68c877fe6b3d7dd07e79a9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 20 May 2018 20:12:32 +0300 Subject: AGESA binaryPI: Fix and optimize for MAX_NODES_NUM MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With nodeid<8, CONFIG_CDB==0x18, PCI device number does not overflow. CONFIG_CDB is not a value we can configure. Change-Id: I23e9707a8ec12dcd80c00688d6237d085d1abf36 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/26437 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones --- src/northbridge/amd/agesa/family14/northbridge.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'src/northbridge/amd/agesa/family14') diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index d26695cd5d..ea21c6952a 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -46,11 +46,7 @@ static unsigned fx_devs = 0; static struct device *get_node_pci(u32 nodeid, u32 fn) { - if ((CONFIG_CDB + nodeid) < 32) { - return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn)); - } else { - return dev_find_slot(CONFIG_CBB-1, PCI_DEVFN(CONFIG_CDB + nodeid - 32, fn)); - } + return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn)); } static void get_fx_devs(void) -- cgit v1.2.3