From 0cc33da5530cf2ef776fc9fa2dbb80bb4dc4c830 Mon Sep 17 00:00:00 2001 From: Kimarie Hoot Date: Sat, 20 Jul 2013 14:28:10 -0600 Subject: ASUS F2A85-M: Split DSDT into common sections (as per Parmer) Rearranged the F2A85-M DSDT file to match the functionality found on Parmer. As with the Parmer implementation, the F2A85-M dsdt.asl file in the mainboard directory contains only #include references to the appropriate files. As with Parmer, some include files have no content but are left as a template for other platforms and as placeholders for completing the ACPI implementation for F2A85-M. Change-Id: Ic72cb6004538ca9d9f79826b9b3c8d6aeb25017c Signed-off-by: Kimarie Hoot Reviewed-on: http://review.coreboot.org/3805 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'src/northbridge/amd/agesa') diff --git a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl index cb442fd851..28c00029d0 100755 --- a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl +++ b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl @@ -49,6 +49,16 @@ Device(AMRT) { Name(_ADR, 0x00000000) } /* end AMRT */ +/* Dev2 is also an external GFX bridge */ +Device(PBR2) { + Name(_ADR, 0x00020000) + Name(_PRW, Package() {0x18, 4}) + Method(_PRT,0) { + If(PMOD){ Return(APS2) } /* APIC mode */ + Return (PS2) /* PIC Mode */ + } /* end _PRT */ +} /* end PBR2 */ + /* Dev4 GPP0 Root Port Bridge */ Device(PBR4) { Name(_ADR, 0x00040000) -- cgit v1.2.3