From 400ce55566caa541304b2483e61bcc2df941998c Mon Sep 17 00:00:00 2001
From: Elyes HAOUAS <ehaouas@noos.fr>
Date: Fri, 12 Oct 2018 10:54:30 +0200
Subject: cpu/amd: Use common AMD's MSR

Phase 1. Due to the size of the effort, this CL is broken into several
phases.

Change-Id: I0236e0960cd1e79558ea50c814e1de2830aa0550
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29065
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
---
 src/northbridge/amd/agesa/family12/northbridge.c   | 3 ++-
 src/northbridge/amd/agesa/family14/northbridge.c   | 6 ++----
 src/northbridge/amd/agesa/family15tn/northbridge.c | 6 ++----
 src/northbridge/amd/agesa/family16kb/northbridge.c | 6 ++----
 4 files changed, 8 insertions(+), 13 deletions(-)

(limited to 'src/northbridge/amd/agesa')

diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index dbe88d59bc..1851118645 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -29,6 +29,7 @@
 #include <cbmem.h>
 
 #include <cpu/x86/lapic.h>
+#include <cpu/amd/msr.h>
 #include <cpu/amd/mtrr.h>
 
 #include "sb_cimx.h"
@@ -306,7 +307,7 @@ static void read_resources(struct device *dev)
 	 * It is not honored by the coreboot resource allocator if it is in
 	 * the CPU_CLUSTER.
 	 */
-	mmconf_resource(dev, 0xc0010058);
+	mmconf_resource(dev, MMIO_CONF_BASE);
 
 	printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s - End.\n",__func__);
 }
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index ea21c6952a..ae5b227bee 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -27,13 +27,11 @@
 #include <lib.h>
 #include <cpu/cpu.h>
 #include <cbmem.h>
-
 #include <cpu/x86/lapic.h>
+#include <cpu/amd/msr.h>
 #include <cpu/amd/mtrr.h>
-
 #include <northbridge/amd/agesa/state_machine.h>
 #include <northbridge/amd/agesa/agesa_helper.h>
-
 #include <sb_cimx.h>
 
 #define FX_DEVS 1
@@ -298,7 +296,7 @@ static void nb_read_resources(struct device *dev)
 	 * It is not honored by the coreboot resource allocator if it is in
 	 * the CPU_CLUSTER.
 	 */
-	mmconf_resource(dev, 0xc0010058);
+	mmconf_resource(dev, MMIO_CONF_BASE);
 }
 
 static void set_resource(struct device *dev, struct resource *resource,
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index 76fd747c91..7248eb79a0 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -29,14 +29,12 @@
 #include <cpu/cpu.h>
 #include <cbmem.h>
 #include <AGESA.h>
-
 #include <cpu/x86/lapic.h>
+#include <cpu/amd/msr.h>
 #include <cpu/amd/mtrr.h>
-
 #include <Porting.h>
 #include <Options.h>
 #include <Topology.h>
-
 #include <northbridge/amd/agesa/state_machine.h>
 #include <northbridge/amd/agesa/agesa_helper.h>
 
@@ -307,7 +305,7 @@ static void nb_read_resources(struct device *dev)
 	 * It is not honored by the coreboot resource allocator if it is in
 	 * the CPU_CLUSTER.
 	 */
-	mmconf_resource(dev, 0xc0010058);
+	mmconf_resource(dev, MMIO_CONF_BASE);
 }
 
 static void set_resource(struct device *dev, struct resource *resource, u32 nodeid)
diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c
index 6e0eabaa50..a42ee5cd51 100644
--- a/src/northbridge/amd/agesa/family16kb/northbridge.c
+++ b/src/northbridge/amd/agesa/family16kb/northbridge.c
@@ -27,15 +27,13 @@
 #include <lib.h>
 #include <cpu/cpu.h>
 #include <cbmem.h>
-
 #include <cpu/x86/lapic.h>
+#include <cpu/amd/msr.h>
 #include <cpu/amd/mtrr.h>
-
 #include <Porting.h>
 #include <AGESA.h>
 #include <Options.h>
 #include <Topology.h>
-
 #include <northbridge/amd/agesa/state_machine.h>
 #include <northbridge/amd/agesa/agesa_helper.h>
 
@@ -306,7 +304,7 @@ static void read_resources(struct device *dev)
 	 * It is not honored by the coreboot resource allocator if it is in
 	 * the APIC_CLUSTER.
 	 */
-	mmconf_resource(dev, 0xc0010058);
+	mmconf_resource(dev, MMIO_CONF_BASE);
 }
 
 static void set_resource(struct device *dev, struct resource *resource, u32 nodeid)
-- 
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