From af87020f0a3a813e03d3b059ae4284bbc8848ff1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 14 Dec 2014 16:36:09 +0200 Subject: AGESA fam12: Fix MMCONF region MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit MMIO for non-posted region used hard-coded setting for 64 buses while MSR programming was for 256 buses. Change-Id: I690237dd459f7b7b4da68ae55ae9d22b79e5f255 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/7812 Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc --- src/northbridge/amd/agesa/family12/agesawrapper.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'src/northbridge/amd/agesa') diff --git a/src/northbridge/amd/agesa/family12/agesawrapper.c b/src/northbridge/amd/agesa/family12/agesawrapper.c index f25e7379a9..d2aa3305f1 100644 --- a/src/northbridge/amd/agesa/family12/agesawrapper.c +++ b/src/northbridge/amd/agesa/family12/agesawrapper.c @@ -176,7 +176,7 @@ AGESA_STATUS agesawrapper_amdinitmmio(VOID) Set the MMIO Configuration Base Address and Bus Range onto MMIO configuration base Address MSR register. */ - MsrReg = CONFIG_MMCONF_BASE_ADDRESS | (8 << 2) | 1; + MsrReg = CONFIG_MMCONF_BASE_ADDRESS | (LibAmdBitScanReverse(CONFIG_MMCONF_BUS_NUMBER) << 2) | 1; LibAmdMsrWrite(0xC0010058, &MsrReg, &StdHeader); /* @@ -187,7 +187,9 @@ AGESA_STATUS agesawrapper_amdinitmmio(VOID) LibAmdMsrWrite(0xC001001F, &MsrReg, &StdHeader); /* Enable Non-Post Memory in CPU */ - PciData = ((CONFIG_MMCONF_BASE_ADDRESS >> 8) | 0x3FF80); + PciData = CONFIG_MMCONF_BASE_ADDRESS + (CONFIG_MMCONF_BUS_NUMBER * 0x100000) - 1; + PciData = (PciData >> 8) & ~0xff; + PciData |= 0x80; PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x018, 0x01, 0xA4); LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); @@ -198,7 +200,6 @@ AGESA_STATUS agesawrapper_amdinitmmio(VOID) /* Enable memory access */ PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0, 0, 0x04); LibAmdPciRead(AccessWidth8, PciAddress, &PciData, &StdHeader); - PciData |= BIT1; PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0, 0, 0x04); LibAmdPciWrite(AccessWidth8, PciAddress, &PciData, &StdHeader); -- cgit v1.2.3