From 8e3464109e47945b1a4d7e3dd0c6e291593de70a Mon Sep 17 00:00:00 2001 From: Indrek Kruusa Date: Thu, 3 Aug 2006 16:48:18 +0000 Subject: Changelog: * src/cpu/amd/model_lx/model_lx_init.c L2 cache initialization removed (moved to northbridge.c) * src/include/cpu/amd/lxdef.h more checked values * src/northbridge/amd/lx/northbridge.c L2 cache initialization added cpubug() commented out * src/northbridge/amd/lx/raminit.c empty function sdram_set_registers() is in use, don't remove * src/mainboard/artecgroup/dbe61/Config.lb irqmap changes * src/mainboard/artecgroup/dbe61/irq_tables.c tentative changes to irq table (currently not in use) * src/mainboard/artecgroup/dbe61/mainboard.c irq assigned manually to NIC * src/mainboard/artecgroup/dbe61/Options.lb gcc 4.0 is OK * targets/artecgroup/dbe61/Config.lb 64K for VSA is OK at moment Signed-off-by: Indrek Kruusa Signed-off-by: Andrei Birjukov git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2360 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/amd/lx/raminit.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'src/northbridge/amd/lx/raminit.c') diff --git a/src/northbridge/amd/lx/raminit.c b/src/northbridge/amd/lx/raminit.c index 7fd39ae22e..d4a5d7b701 100644 --- a/src/northbridge/amd/lx/raminit.c +++ b/src/northbridge/amd/lx/raminit.c @@ -1,13 +1,10 @@ #include -#if 0 + static void sdram_set_registers(const struct mem_controller *ctrl) { } -#endif - - /* Section 6.1.3, LX processor databooks, BIOS Initialization Sequence * Section 4.1.4, GX/CS5535 GeodeROM Porting guide */ static void sdram_enable(int controllers, const struct mem_controller *ctrl) -- cgit v1.2.3