From d13bd05b7a94fc4744cba1a94280797f7c1ce3cd Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Wed, 22 Apr 2020 16:39:20 +0200 Subject: nb/intel: Const'ify pci_devfn_t devices Change-Id: Ib470523200929868280f57bb0cc82b038d2fedf6 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/40610 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/northbridge/intel/e7505/memmap.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/northbridge/intel/e7505') diff --git a/src/northbridge/intel/e7505/memmap.c b/src/northbridge/intel/e7505/memmap.c index 92b2ae7740..b1ac3d1124 100644 --- a/src/northbridge/intel/e7505/memmap.c +++ b/src/northbridge/intel/e7505/memmap.c @@ -12,7 +12,7 @@ void *cbmem_top_chipset(void) { - pci_devfn_t mch = PCI_DEV(0, 0, 0); + const pci_devfn_t mch = PCI_DEV(0, 0, 0); uintptr_t tolm; /* This is at 128 MiB boundary. */ @@ -26,7 +26,7 @@ void northbridge_write_smram(u8 smram); void northbridge_write_smram(u8 smram) { - pci_devfn_t mch = PCI_DEV(0, 0, 0); + const pci_devfn_t mch = PCI_DEV(0, 0, 0); pci_write_config8(mch, SMRAMC, smram); } -- cgit v1.2.3