From 5a1f5970857a5ad1fda0cf9d5945192408bf537b Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Wed, 31 Mar 2010 14:34:40 +0000 Subject: This patch drops arch/i386/lib/console.c and arch/i386/lib/console_print.c and makes include/console/console.h and console/console.c usable both in __PRE_RAM__ and coreboot_ram stages. While debugging this, I removed an indirection from the e7520 ram init code (same as we did on a couple of other chipsets, removes some register pressure from romcc) Also, drop remainders of CONFIG_USE_INIT (except the one odd piece of dead code in cache_as_ram.inc) Then some ap_romstage.c fixes, at least the nvidia/l1_2pvv compiled for me with CONFIG_AP_CODE_IN_CAR set in Kconfig which it did not before. Signed-off-by: Stefan Reinauer Acked-by: Myles Watson git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5341 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/intel/e7520/raminit.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/northbridge/intel/e7520/raminit.h') diff --git a/src/northbridge/intel/e7520/raminit.h b/src/northbridge/intel/e7520/raminit.h index 183ace8385..9fcc3801bb 100644 --- a/src/northbridge/intel/e7520/raminit.h +++ b/src/northbridge/intel/e7520/raminit.h @@ -4,9 +4,9 @@ #define DIMM_SOCKETS 4 struct mem_controller { unsigned node_id; - device_t f0, f1, f2, f3; - uint16_t channel0[DIMM_SOCKETS]; - uint16_t channel1[DIMM_SOCKETS]; + // device_t f0, f1, f2, f3; + u16 channel0[DIMM_SOCKETS]; + u16 channel1[DIMM_SOCKETS]; }; #endif /* RAMINIT_H */ -- cgit v1.2.3