From d358a506c4230950e34d783bd0187cd200d60691 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Mon, 20 May 2013 16:23:40 -0700 Subject: Add support to enable/disable builtin GbE In case we are going to use this in future designs. BUG=none TEST=none BRANCH=none Change-Id: I750addf10e4fe6f8240f8c8262253f8af7027e29 Signed-off-by: Stefan Reinauer Reviewed-on: https://gerrit.chromium.org/gerrit/55844 Reviewed-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/3515 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/northbridge/intel/haswell/pei_data.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/northbridge/intel/haswell') diff --git a/src/northbridge/intel/haswell/pei_data.h b/src/northbridge/intel/haswell/pei_data.h index 280c73b75a..7c10e41844 100644 --- a/src/northbridge/intel/haswell/pei_data.h +++ b/src/northbridge/intel/haswell/pei_data.h @@ -31,7 +31,7 @@ #define PEI_DATA_H typedef void (*tx_byte_func)(unsigned char byte); -#define PEI_VERSION 10 +#define PEI_VERSION 11 struct pei_data { @@ -53,6 +53,7 @@ struct pei_data uint8_t spd_addresses[4]; int boot_mode; int ec_present; + int gbe_enable; // 0 = leave channel enabled // 1 = disable dimm 0 on channel // 2 = disable dimm 1 on channel -- cgit v1.2.3