From c70eed1e6202c928803f3e7f79161cd247a62b23 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Tue, 22 May 2018 02:18:00 +0300 Subject: device: Use pcidev_on_root() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Icf34b39d80f6e46d32a39b68f38fb2752c0bcebc Signed-off-by: Kyösti Mälkki Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/26484 Tested-by: build bot (Jenkins) Reviewed-by: Piotr Król Reviewed-by: Arthur Heymans --- src/northbridge/intel/pineview/early_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/northbridge/intel/pineview/early_init.c') diff --git a/src/northbridge/intel/pineview/early_init.c b/src/northbridge/intel/pineview/early_init.c index 7f90529ef2..89744289a2 100644 --- a/src/northbridge/intel/pineview/early_init.c +++ b/src/northbridge/intel/pineview/early_init.c @@ -41,7 +41,7 @@ static void early_graphics_setup(void) u16 reg16; u32 reg32; - const struct device *d0f0 = dev_find_slot(0, PCI_DEVFN(0,0)); + const struct device *d0f0 = pcidev_on_root(0, 0); const struct northbridge_intel_pineview_config *config = d0f0->chip_info; pci_write_config8(D0F0, DEVEN, BOARD_DEVEN); -- cgit v1.2.3