From d346a19dedf28aecc4a2bce7ab9ee08323b63a1c Mon Sep 17 00:00:00 2001 From: "Jonathan A. Kollasch" Date: Tue, 11 Feb 2020 09:03:48 -0600 Subject: nb/intel/sandybridge: Add Xeon E3-1200 (v1) hostbridge PCI ID Change-Id: I70187d09ecdaa8149299cdd8f6f8fc9517b05e15 Signed-off-by: Jonathan A. Kollasch Reviewed-on: https://review.coreboot.org/c/coreboot/+/38865 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/northbridge/intel/sandybridge/northbridge.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/northbridge/intel/sandybridge/northbridge.c') diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index 68f8411366..cc8a62ced1 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -461,7 +461,7 @@ static struct device_operations mc_ops = { }; static const unsigned short pci_device_ids[] = { - 0x0100, 0x0104, /* Sandy Bridge */ + 0x0100, 0x0104, 0x0108, /* Sandy Bridge */ 0x0150, 0x0154, 0x0158, /* Ivy Bridge */ 0 }; -- cgit v1.2.3