From 4cb44e564530fd1fc73f809542f8dbebf79f1c1a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Fri, 18 Nov 2016 19:11:24 +0200 Subject: intel sandy/ivy: Move SPD loading after TS_BEFORE_INITRAM MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Take the timestamp before SPD loading takes place, for easier comparison against MRC blob performance and followup changes will optimize some of the slow SPD/SMBus operations. Change-Id: I50b5a9d02d2caf4c63e1a4025544131a085b8fb6 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/17489 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Patrick Rudolph Reviewed-by: Aaron Durbin --- src/northbridge/intel/sandybridge/raminit_native.h | 1 - 1 file changed, 1 deletion(-) (limited to 'src/northbridge/intel/sandybridge/raminit_native.h') diff --git a/src/northbridge/intel/sandybridge/raminit_native.h b/src/northbridge/intel/sandybridge/raminit_native.h index 8f8d057313..0b26bd9b30 100644 --- a/src/northbridge/intel/sandybridge/raminit_native.h +++ b/src/northbridge/intel/sandybridge/raminit_native.h @@ -20,7 +20,6 @@ #include /* The order is ch0dimmA, ch0dimmB, ch1dimmA, ch1dimmB. */ -void init_dram_ddr3(spd_raw_data *spds, int mobile, int min_tck, int s3resume); void read_spd(spd_raw_data *spd, u8 addr); void mainboard_get_spd(spd_raw_data *spd); -- cgit v1.2.3