From ffa520fc13da3504efb2e9a8d50f5fbd91580a09 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Tue, 7 Jan 2020 12:00:31 +0200
Subject: intel/sandybridge,bd82x6x: Move enable_smbus() call
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Change-Id: Icc6b572fea0c2097a7ed19b3f76c1e658cf32a9a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38298
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
---
 src/northbridge/intel/sandybridge/romstage.c | 3 ---
 1 file changed, 3 deletions(-)

(limited to 'src/northbridge/intel/sandybridge')

diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c
index 079e1b13ba..7d1c019207 100644
--- a/src/northbridge/intel/sandybridge/romstage.c
+++ b/src/northbridge/intel/sandybridge/romstage.c
@@ -82,9 +82,6 @@ void mainboard_romstage_entry(void)
 
 	mainboard_early_init(s3resume);
 
-	/* Enable SPD ROMs and DDR-III DRAM */
-	enable_smbus();
-
 	post_code(0x39);
 
 	perform_raminit(s3resume);
-- 
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