From c70eed1e6202c928803f3e7f79161cd247a62b23 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Tue, 22 May 2018 02:18:00 +0300 Subject: device: Use pcidev_on_root() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Icf34b39d80f6e46d32a39b68f38fb2752c0bcebc Signed-off-by: Kyösti Mälkki Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/26484 Tested-by: build bot (Jenkins) Reviewed-by: Piotr Król Reviewed-by: Arthur Heymans --- src/northbridge/intel/x4x/gma.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/northbridge/intel/x4x/gma.c') diff --git a/src/northbridge/intel/x4x/gma.c b/src/northbridge/intel/x4x/gma.c index 1fcc682c86..680b83698b 100644 --- a/src/northbridge/intel/x4x/gma.c +++ b/src/northbridge/intel/x4x/gma.c @@ -69,10 +69,10 @@ static void gma_func0_init(struct device *dev) pci_write_config32(dev, PCI_COMMAND, reg32); /* configure GMBUSFREQ */ - reg16 = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x2, 0)), 0xcc); + reg16 = pci_read_config16(pcidev_on_root(0x2, 0), 0xcc); reg16 &= ~0x1ff; reg16 |= 0xbc; - pci_write_config16(dev_find_slot(0, PCI_DEVFN(0x2, 0)), 0xcc, reg16); + pci_write_config16(pcidev_on_root(0x2, 0), 0xcc, reg16); int vga_disable = (pci_read_config16(dev, D0F0_GGC) & 2) >> 1; @@ -93,7 +93,7 @@ static void gma_func0_init(struct device *dev) static void gma_func0_disable(struct device *dev) { - struct device *dev_host = dev_find_slot(0, PCI_DEVFN(0, 0)); + struct device *dev_host = pcidev_on_root(0, 0); u16 ggc; ggc = pci_read_config16(dev_host, D0F0_GGC); @@ -117,7 +117,7 @@ static void gma_set_subsystem(struct device *dev, unsigned int vendor, const struct i915_gpu_controller_info * intel_gma_get_controller_info(void) { - struct device *dev = dev_find_slot(0, PCI_DEVFN(0x2, 0)); + struct device *dev = pcidev_on_root(0x2, 0); if (!dev) return NULL; struct northbridge_intel_x4x_config *chip = dev->chip_info; -- cgit v1.2.3