From f5cf60f25b8c77e0c90094e3326c5bc0e37cb383 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 18 Mar 2019 15:26:48 +0200 Subject: Move calls to quick_ram_check() before CBMEM init MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit After raminit completes, do a read-modify-write test just below CBMEM top address. If test fails, die(). Change-Id: I33d4153a5ce0908b8889517394afb46f1ca28f92 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/31978 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Werner Zeh --- src/northbridge/intel/x4x/raminit.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/northbridge/intel/x4x') diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c index 72ef1a915e..02a8b74f70 100644 --- a/src/northbridge/intel/x4x/raminit.c +++ b/src/northbridge/intel/x4x/raminit.c @@ -23,7 +23,6 @@ #include #include #include -#include #include "iomap.h" #if CONFIG(SOUTHBRIDGE_INTEL_I82801GX) #include /* smbus_read_byte */ @@ -734,6 +733,5 @@ void sdram_initialize(int boot_path, const u8 *spd_map) } timestamp_add_now(TS_AFTER_INITRAM); - quick_ram_check(); printk(BIOS_DEBUG, "Memory initialized\n"); } -- cgit v1.2.3