From 015339fbf0be099b37c60e4c459f9e8abe2a886e Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 20 Aug 2018 11:28:58 +0200 Subject: nb/intel/pineview: Use the correct address for the RCVEN strobe When doing the receive enable training, the final mapping of the ranks is already done, so we can be sure that that address 0x00000000 there will always be a rank. Change-Id: I7ac017a8816fc9a47cef0695826a1c32f699f6f8 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/28230 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/northbridge/intel/pineview/raminit.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src/northbridge/intel') diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c index f1e0767d9a..a050e06684 100644 --- a/src/northbridge/intel/pineview/raminit.c +++ b/src/northbridge/intel/pineview/raminit.c @@ -1875,7 +1875,9 @@ static void sdram_rcven(struct sysinfo *s) u8 minbytelanecoarse = 0xff; u8 bytelaneoffset; u8 maxbytelane = 8; - u32 strobeaddr = (rank_is_populated(s->dimms, 0, 0)) ? 0 : 2*128*1024*1024; + /* Since dra/drb is already set up we know that at address 0x00000000 + we will always find the first available rank */ + u32 strobeaddr = 0; u32 dqshighaddr; MCHBAR8(0x5d8) = MCHBAR8(0x5d8) & ~0xc; -- cgit v1.2.3