From 3ac400e6e57f2efc8db06b9b3206b253d142c741 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Tue, 30 Mar 2010 22:12:59 +0000 Subject: drop USE_INIT should be USE_PRINTK_IN_CAR here. uint32_t should be u32 DEBUG_RAM_SETUP was failing on some northbridges Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5338 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/intel/e7501/debug.c | 32 +++++++++++++++--------------- src/northbridge/intel/i440bx/raminit.c | 6 ++++-- src/northbridge/intel/i82810/northbridge.c | 2 -- src/northbridge/intel/i82810/raminit.c | 16 +++++++++++---- src/northbridge/intel/i82830/raminit.c | 12 +++++------ 5 files changed, 38 insertions(+), 30 deletions(-) (limited to 'src/northbridge/intel') diff --git a/src/northbridge/intel/e7501/debug.c b/src/northbridge/intel/e7501/debug.c index cc82e2f60d..c05059be99 100644 --- a/src/northbridge/intel/e7501/debug.c +++ b/src/northbridge/intel/e7501/debug.c @@ -39,7 +39,7 @@ static void dump_pci_device(unsigned dev) for(i = 0; i < 256; i++) { unsigned char val; if ((i & 0x0f) == 0) { -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "\r\n%02x:",i); #else print_debug("\r\n"); @@ -48,7 +48,7 @@ static void dump_pci_device(unsigned dev) #endif } val = pci_read_config8(dev, i); -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, " %02x", val); #else print_debug_char(' '); @@ -101,7 +101,7 @@ static void dump_spd_registers(const struct mem_controller *ctrl) device = ctrl->channel0[i]; if (device) { int j; -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device); #else print_debug("dimm: "); @@ -113,7 +113,7 @@ static void dump_spd_registers(const struct mem_controller *ctrl) int status; unsigned char byte; if ((j & 0xf) == 0) { -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "\r\n%02x: ", j); #else print_debug("\r\n"); @@ -126,7 +126,7 @@ static void dump_spd_registers(const struct mem_controller *ctrl) break; } byte = status & 0xff; -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "%02x ", byte); #else print_debug_hex8(byte); @@ -138,7 +138,7 @@ static void dump_spd_registers(const struct mem_controller *ctrl) device = ctrl->channel1[i]; if (device) { int j; -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device); #else` print_debug("dimm: "); @@ -150,7 +150,7 @@ static void dump_spd_registers(const struct mem_controller *ctrl) int status; unsigned char byte; if ((j & 0xf) == 0) { -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "\r\n%02x: ", j); #else print_debug("\r\n"); @@ -163,7 +163,7 @@ static void dump_spd_registers(const struct mem_controller *ctrl) break; } byte = status & 0xff; -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "%02x ", byte); #else print_debug_hex8(byte); @@ -181,7 +181,7 @@ static void dump_smbus_registers(void) for(device = 1; device < 0x80; device++) { int j; if( smbus_read_byte(device, 0) < 0 ) continue; -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "smbus: %02x", device); #else print_debug("smbus: "); @@ -195,7 +195,7 @@ static void dump_smbus_registers(void) break; } if ((j & 0xf) == 0) { -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "\r\n%02x: ",j); #else print_debug("\r\n"); @@ -204,7 +204,7 @@ static void dump_smbus_registers(void) #endif } byte = status & 0xff; -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "%02x ", byte); #else print_debug_hex8(byte); @@ -219,7 +219,7 @@ static void dump_io_resources(unsigned port) { int i; -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "%04x:\r\n", port); #else print_debug_hex16(port); @@ -228,7 +228,7 @@ static void dump_io_resources(unsigned port) for(i=0;i<256;i++) { uint8_t val; if ((i & 0x0f) == 0) { -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "%02x:", i); #else print_debug_hex8(i); @@ -236,7 +236,7 @@ static void dump_io_resources(unsigned port) #endif } val = inb(port); -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, " %02x",val); #else print_debug_char(' '); @@ -255,7 +255,7 @@ static void dump_mem(unsigned start, unsigned end) print_debug("dump_mem:"); for(i=start;i 128)) { - print_err ("DIMMs > 128MB per side\r\n" + print_err("DIMMs > 128MB per side\r\n" "are not supported on this NB\r\n"); die("HALT\r\n"); } diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c index 952455a672..5b68046e7e 100644 --- a/src/northbridge/intel/i82810/northbridge.c +++ b/src/northbridge/intel/i82810/northbridge.c @@ -208,8 +208,6 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { - struct device_path path; - /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { dev->ops = &pci_domain_ops; diff --git a/src/northbridge/intel/i82810/raminit.c b/src/northbridge/intel/i82810/raminit.c index 5ad4e4be73..e88580c5e8 100644 --- a/src/northbridge/intel/i82810/raminit.c +++ b/src/northbridge/intel/i82810/raminit.c @@ -30,12 +30,17 @@ Macros and definitions. -----------------------------------------------------------------------------*/ /* Debugging macros. */ +#define HAVE_ENOUGH_REGISTERS 0 /* Don't have enough registers to compile all + * debugging code with ROMCC + */ #if CONFIG_DEBUG_RAM_SETUP #define PRINT_DEBUG(x) print_debug(x) #define PRINT_DEBUG_HEX8(x) print_debug_hex8(x) #define PRINT_DEBUG_HEX16(x) print_debug_hex16(x) #define PRINT_DEBUG_HEX32(x) print_debug_hex32(x) -#define DUMPNORTH() dump_pci_device(PCI_DEV(0, 0, 0)) +// no dump_pci_device in src/northbridge/intel/i82810/ +// #define DUMPNORTH() dump_pci_device(PCI_DEV(0, 0, 0)) +#define DUMPNORTH() #else #define PRINT_DEBUG(x) #define PRINT_DEBUG_HEX8(x) @@ -138,26 +143,29 @@ static void do_ram_command(u8 command) drp = (drp >> (i * 4)) & 0x0f; dimm_size = translate_i82810_to_mb[drp]; - addr = (dimm_start * 1024 * 1024) + addr_offset; if (dimm_size) { + addr = (dimm_start * 1024 * 1024) + addr_offset; +#if HAVE_ENOUGH_REGISTERS PRINT_DEBUG(" Sending RAM command 0x"); PRINT_DEBUG_HEX8(reg8); PRINT_DEBUG(" to 0x"); PRINT_DEBUG_HEX32(addr); PRINT_DEBUG("\r\n"); +#endif read32(addr); } dimm_bank = translate_i82810_to_bank[drp]; - addr = ((dimm_start + dimm_bank) * 1024 * 1024) + addr_offset; if (dimm_bank) { + addr = ((dimm_start + dimm_bank) * 1024 * 1024) + addr_offset; +#if HAVE_ENOUGH_REGISTERS PRINT_DEBUG(" Sending RAM command 0x"); PRINT_DEBUG_HEX8(reg8); PRINT_DEBUG(" to 0x"); PRINT_DEBUG_HEX32(addr); PRINT_DEBUG("\r\n"); - +#endif read32(addr); } diff --git a/src/northbridge/intel/i82830/raminit.c b/src/northbridge/intel/i82830/raminit.c index 2eea5f0e19..f97eaa893d 100644 --- a/src/northbridge/intel/i82830/raminit.c +++ b/src/northbridge/intel/i82830/raminit.c @@ -67,9 +67,9 @@ Macros and definitions. DIMM-initialization functions. -----------------------------------------------------------------------------*/ -static void do_ram_command(uint32_t command) +static void do_ram_command(u32 command) { - uint32_t reg32; + u32 reg32; /* Configure the RAM command. */ reg32 = pci_read_config32(NORTHBRIDGE, DRC); @@ -82,7 +82,7 @@ static void do_ram_command(uint32_t command) PRINT_DEBUG("\r\n"); } -static void ram_read32(uint8_t dimm_start, uint32_t offset) +static void ram_read32(u8 dimm_start, u32 offset) { if (offset == 0x55aa55aa) { PRINT_DEBUG(" Reading RAM at 0x"); @@ -114,7 +114,7 @@ static void ram_read32(uint8_t dimm_start, uint32_t offset) static void initialize_dimm_rows(void) { int i, row; - uint8_t dimm_start, dimm_end; + u8 dimm_start, dimm_end; unsigned device; dimm_start = 0; @@ -487,7 +487,7 @@ static void sdram_set_registers(void) static void northbridge_set_registers(void) { - uint16_t value; + u16 value; int igd_memory = 0; PRINT_DEBUG("Setting initial nothbridge registers....\r\n"); @@ -542,7 +542,7 @@ static void northbridge_set_registers(void) static void sdram_initialize(void) { int i; - uint32_t reg32; + u32 reg32; /* Setup Initial SDRAM Registers */ sdram_set_registers(); -- cgit v1.2.3