From b5fb0c5c4eda2329d848aedcf4f7e8b6dc8012b2 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Thu, 30 Apr 2009 13:58:42 +0000 Subject: Add high tables support to all northbridges. Signed-off-by: Stefan Reinauer Acked-by: Patrick Georgi git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4238 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/via/cn700/Config.lb | 6 ++++++ src/northbridge/via/cn700/northbridge.c | 13 +++++++++++++ 2 files changed, 19 insertions(+) (limited to 'src/northbridge/via/cn700') diff --git a/src/northbridge/via/cn700/Config.lb b/src/northbridge/via/cn700/Config.lb index 6a0b60cfe0..b824a17b75 100644 --- a/src/northbridge/via/cn700/Config.lb +++ b/src/northbridge/via/cn700/Config.lb @@ -18,8 +18,14 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## +uses HAVE_HIGH_TABLES + config chip.h + object vgabios.o + driver northbridge.o driver agp.o driver vga.o + +default HAVE_HIGH_TABLES=1 diff --git a/src/northbridge/via/cn700/northbridge.c b/src/northbridge/via/cn700/northbridge.c index af914528d9..2d3adf1288 100644 --- a/src/northbridge/via/cn700/northbridge.c +++ b/src/northbridge/via/cn700/northbridge.c @@ -163,6 +163,12 @@ static u32 find_pci_tolm(struct bus *bus) return tolm; } +#if HAVE_HIGH_TABLES==1 +/* maximum size of high tables in KB */ +#define HIGH_TABLES_SIZE 64 +extern uint64_t high_tables_base, high_tables_size; +#endif + static void pci_domain_set_resources(device_t dev) { /* The order is important to find the correct RAM size. */ @@ -199,6 +205,13 @@ static void pci_domain_set_resources(device_t dev) /* The PCI hole does does not overlap the memory. */ tolmk = tomk; } + +#if HAVE_HIGH_TABLES == 1 + high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024; + high_tables_size = HIGH_TABLES_SIZE* 1024; + printk_debug("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); +#endif + /* Report the memory regions. */ idx = 10; /* TODO: Hole needed? */ -- cgit v1.2.3