From 2a19fb1d76c42cb516a4ab6f253de8c65d8cc3ad Mon Sep 17 00:00:00 2001 From: Vladimir Serbinenko Date: Thu, 2 Oct 2014 20:09:19 +0200 Subject: amdfam10: Move to per-device ACPI Change-Id: I9ce2333e1ea527843f83d411dea2a669263156c2 Signed-off-by: Vladimir Serbinenko Reviewed-on: http://review.coreboot.org/7027 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan --- src/northbridge/amd/agesa/family10/Makefile.inc | 2 - src/northbridge/amd/agesa/family10/ssdt.asl | 345 ------------------------ src/northbridge/amd/amdfam10/Kconfig | 1 + src/northbridge/amd/amdfam10/Makefile.inc | 1 - src/northbridge/amd/amdfam10/acpi.c | 209 ++++++++------ src/northbridge/amd/amdfam10/amdfam10.h | 6 + src/northbridge/amd/amdfam10/northbridge.c | 4 + src/northbridge/amd/amdfam10/ssdt.asl | 345 ------------------------ src/northbridge/amd/amdfam10/sspr1.asl | 39 --- src/northbridge/amd/amdfam10/sspr2.asl | 40 --- src/northbridge/amd/amdfam10/sspr3.asl | 41 --- src/northbridge/amd/amdfam10/sspr4.asl | 42 --- src/northbridge/amd/amdfam10/sspr5.asl | 43 --- src/northbridge/amd/amdk8/acpi.c | 4 - src/northbridge/amd/amdk8/northbridge.c | 3 + 15 files changed, 138 insertions(+), 987 deletions(-) delete mode 100644 src/northbridge/amd/agesa/family10/ssdt.asl delete mode 100644 src/northbridge/amd/amdfam10/ssdt.asl delete mode 100644 src/northbridge/amd/amdfam10/sspr1.asl delete mode 100644 src/northbridge/amd/amdfam10/sspr2.asl delete mode 100644 src/northbridge/amd/amdfam10/sspr3.asl delete mode 100644 src/northbridge/amd/amdfam10/sspr4.asl delete mode 100644 src/northbridge/amd/amdfam10/sspr5.asl (limited to 'src/northbridge') diff --git a/src/northbridge/amd/agesa/family10/Makefile.inc b/src/northbridge/amd/agesa/family10/Makefile.inc index a10a4a1c21..87f4927441 100644 --- a/src/northbridge/amd/agesa/family10/Makefile.inc +++ b/src/northbridge/amd/agesa/family10/Makefile.inc @@ -18,5 +18,3 @@ # ramstage-y += northbridge.c - -ramstage-$(CONFIG_HAVE_ACPI_TABLES) += ssdt.asl diff --git a/src/northbridge/amd/agesa/family10/ssdt.asl b/src/northbridge/amd/agesa/family10/ssdt.asl deleted file mode 100644 index 63650fbcd4..0000000000 --- a/src/northbridge/amd/agesa/family10/ssdt.asl +++ /dev/null @@ -1,345 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* - * Make sure HC_NUMS and HC_POSSIBLE_NUM setting is consistent to this file - */ - -DefinitionBlock ("SSDT.aml", "SSDT", 1, "AMD-FAM15H", "AMD-ACPI", 0x1000) -{ - /* - * These objects were referenced but not defined in this table - */ - External (\_SB_.PCI0, DeviceObj) - - Scope (\_SB.PCI0) - { - Name (BUSN, Package (0x20) /* HC_NUMS */ - { - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x10101010, - 0x11111111, - 0x12121212, - 0x13131313, - 0x14141414, - 0x15151515, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc - }) - Name (MMIO, Package (0x80) /* HC_NUMS * 4 */ - { - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x11111111, - 0x22222222, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x11111111, - 0x22222222, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x11111111, - 0x22222222, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x11111111, - 0x22222222, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x11111111, - 0x22222222, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888 - }) - Name (PCIO, Package (0x40) /* HC_NUMS * 2 */ - { - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x77777777, - 0x88888888, - 0x99999999, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444 - }) - Name (SBLK, 0x11) - Name (TOM1, 0xaaaaaaaa) - Name (SBDN, 0xbbbbbbbb) - Name (HCLK, Package (0x20) /* HC_POSSIBLE_NUM */ - { - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888 - }) - Name (HCDN, Package (0x20) /* HC_POSSIBLE_NUM */ - { - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888 - }) - Name (CBB, 0x99) - Name (CBST, 0x88) - Name (CBB2, 0x77) - Name (CBS2, 0x66) - - } -} diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig index 4526e01b43..0789ac3429 100644 --- a/src/northbridge/amd/amdfam10/Kconfig +++ b/src/northbridge/amd/amdfam10/Kconfig @@ -24,6 +24,7 @@ config NORTHBRIDGE_AMD_AMDFAM10 select HAVE_DEBUG_CAR select HYPERTRANSPORT_PLUGIN_SUPPORT select MMCONF_SUPPORT + select PER_DEVICE_ACPI_TABLES if NORTHBRIDGE_AMD_AMDFAM10 config AGP_APERTURE_SIZE diff --git a/src/northbridge/amd/amdfam10/Makefile.inc b/src/northbridge/amd/amdfam10/Makefile.inc index b2e81436fb..ef4bef4654 100644 --- a/src/northbridge/amd/amdfam10/Makefile.inc +++ b/src/northbridge/amd/amdfam10/Makefile.inc @@ -2,7 +2,6 @@ ramstage-y += northbridge.c ramstage-y += misc_control.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c -ramstage-$(CONFIG_HAVE_ACPI_TABLES) += ssdt.asl ramstage-y += get_pci1234.c diff --git a/src/northbridge/amd/amdfam10/acpi.c b/src/northbridge/amd/amdfam10/acpi.c index 513fa58f7e..463fb7cb8a 100644 --- a/src/northbridge/amd/amdfam10/acpi.c +++ b/src/northbridge/amd/amdfam10/acpi.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -162,131 +163,169 @@ unsigned long acpi_fill_slit(unsigned long current) return current; } -// moved from mb acpi_tables.c -static void intx_to_stream(u32 val, u32 len, u8 *dest) +void update_ssdtx(void *ssdtx, int i) { - int i; - for(i=0;i> (8*i)) & 0xff; + u8 *PCI; + u8 *HCIN; + u8 *UID; + + PCI = ssdtx + 0x32; + HCIN = ssdtx + 0x39; + UID = ssdtx + 0x40; + + if (i < 7) { + *PCI = (u8) ('4' + i - 1); + } else { + *PCI = (u8) ('A' + i - 1 - 6); } -} + *HCIN = (u8) i; + *UID = (u8) (i + 3); + + /* FIXME: need to update the GSI id in the ssdtx too */ -static void int_to_stream(u32 val, u8 *dest) -{ - return intx_to_stream(val, 4, dest); } -// used by acpi_tables.h -void update_ssdt(void *ssdt) +void northbridge_acpi_write_vars(void) { - u8 *BUSN; - u8 *MMIO; - u8 *PCIO; - u8 *SBLK; - u8 *TOM1; - u8 *SBDN; - u8 *HCLK; - u8 *HCDN; - u8 *CBST; - u8 *CBBX; - u8 *CBS2; - u8 *CBB2; + msr_t msr; + char pscope[] = "\\_SB.PCI0"; + int i; + get_bus_conf(); /* it will get sblk, pci1234, hcdn, and sbdn */ - int i; - u32 dword; - msr_t msr; + acpigen_write_scope(pscope); - // the offset could be different if have different HC_NUMS, and HC_POSSIBLE_NUM and ssdt.asl - BUSN = ssdt+0x3b; //+5 will be next BUSN - MMIO = ssdt+0xe4; //+5 will be next MMIO - PCIO = ssdt+0x36d; //+5 will be next PCIO - SBLK = ssdt+0x4b2; // one byte - TOM1 = ssdt+0x4b9; // - SBDN = ssdt+0x4c3;// - HCLK = ssdt+0x4d1; //+5 will be next HCLK - HCDN = ssdt+0x57a; //+5 will be next HCDN - CBBX = ssdt+0x61f; // - CBST = ssdt+0x626; - CBB2 = ssdt+0x62d; // - CBS2 = ssdt+0x634; - - for(i=0;i> 20); - int_to_stream(sysconf.sbdn, SBDN); + + acpigen_write_name_dword("SBDN", sysconf.sbdn); + + acpigen_write_name("HCLK"); + + acpigen_write_package(HC_POSSIBLE_NUM); for(i=0;i> 12) & 0xff) { //sb chain on other than bus 0 - *CBST = (u8) (0x0f); + CBST = (u8) (0x0f); } else { - *CBST = (u8) (0x00); + CBST = (u8) (0x00); } } + acpigen_write_name_byte("CBST", CBST); + if((CONFIG_CBB == 0xff) && (sysconf.nodes>32)) { - *CBS2 = 0x0f; - *CBB2 = (u8)(CONFIG_CBB-1); + CBS2 = 0x0f; + CBB2 = (u8)(CONFIG_CBB-1); } else { - *CBS2 = 0x00; - *CBB2 = 0x00; + CBS2 = 0x00; + CBB2 = 0x00; } + acpigen_write_name_byte("CBB2", CBB2); + acpigen_write_name_byte("CBS2", CBS2); + + //minus opcode + acpigen_pop_len(); } -void update_ssdtx(void *ssdtx, int i) +unsigned long northbridge_write_acpi_tables(unsigned long current, + struct acpi_rsdp *rsdp) { - u8 *PCI; - u8 *HCIN; - u8 *UID; - - PCI = ssdtx + 0x32; - HCIN = ssdtx + 0x39; - UID = ssdtx + 0x40; - - if (i < 7) { - *PCI = (u8) ('4' + i - 1); - } else { - *PCI = (u8) ('A' + i - 1 - 6); - } - *HCIN = (u8) i; - *UID = (u8) (i + 3); - - /* FIXME: need to update the GSI id in the ssdtx too */ + acpi_srat_t *srat; + acpi_slit_t *slit; + + get_bus_conf(); /* it will get sblk, pci1234, hcdn, and sbdn */ + + /* SRAT */ + current = ALIGN(current, 8); + printk(BIOS_DEBUG, "ACPI: * SRAT at %lx\n", current); + srat = (acpi_srat_t *) current; + acpi_create_srat(srat); + current += srat->header.length; + acpi_add_table(rsdp, srat); + + /* SLIT */ + current = ALIGN(current, 8); + printk(BIOS_DEBUG, "ACPI: * SLIT at %lx\n", current); + slit = (acpi_slit_t *) current; + acpi_create_slit(slit); + current += slit->header.length; + acpi_add_table(rsdp, slit); + return current; } - diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h index 6e71b4e7f1..d292306586 100644 --- a/src/northbridge/amd/amdfam10/amdfam10.h +++ b/src/northbridge/amd/amdfam10/amdfam10.h @@ -1200,4 +1200,10 @@ u8 get_sbbusn(u8 sblk); #include "northbridge/amd/amdht/porting.h" BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, const u8 **List); +struct acpi_rsdp; + +unsigned long northbridge_write_acpi_tables(unsigned long start, + struct acpi_rsdp *rsdp); +void northbridge_acpi_write_vars(void); + #endif /* AMDFAM10_H */ diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index 70d925b4f1..b28169ec25 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -613,6 +613,10 @@ static struct device_operations northbridge_operations = { .enable_resources = pci_dev_enable_resources, .init = mcf0_control_init, .scan_bus = amdfam10_scan_chains, +#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) + .write_acpi_tables = northbridge_write_acpi_tables, + .acpi_fill_ssdt_generator = northbridge_acpi_write_vars, +#endif .enable = 0, .ops_pci = 0, }; diff --git a/src/northbridge/amd/amdfam10/ssdt.asl b/src/northbridge/amd/amdfam10/ssdt.asl deleted file mode 100644 index 500446afda..0000000000 --- a/src/northbridge/amd/amdfam10/ssdt.asl +++ /dev/null @@ -1,345 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* - * Make sure HC_NUMS and HC_POSSIBLE_NUM setting is consistent to this file - */ - -DefinitionBlock ("SSDT.aml", "SSDT", 1, "AMD-FAM10", "AMD-ACPI", 100925440) -{ - /* - * These objects were referenced but not defined in this table - */ - External (\_SB_.PCI0, DeviceObj) - - Scope (\_SB.PCI0) - { - Name (BUSN, Package (0x20) /* HC_NUMS */ - { - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x10101010, - 0x11111111, - 0x12121212, - 0x13131313, - 0x14141414, - 0x15151515, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc - }) - Name (MMIO, Package (0x80) /* HC_NUMS * 4 */ - { - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x11111111, - 0x22222222, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x11111111, - 0x22222222, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x11111111, - 0x22222222, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x11111111, - 0x22222222, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x11111111, - 0x22222222, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888 - }) - Name (PCIO, Package (0x40) /* HC_NUMS * 2 */ - { - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x77777777, - 0x88888888, - 0x99999999, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444 - }) - Name (SBLK, 0x11) - Name (TOM1, 0xaaaaaaaa) - Name (SBDN, 0xbbbbbbbb) - Name (HCLK, Package (0x20) /* HC_POSSIBLE_NUM */ - { - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888 - }) - Name (HCDN, Package (0x20) /* HC_POSSIBLE_NUM */ - { - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888 - }) - Name (CBB, 0x99) - Name (CBST, 0x88) - Name (CBB2, 0x77) - Name (CBS2, 0x66) - - } -} diff --git a/src/northbridge/amd/amdfam10/sspr1.asl b/src/northbridge/amd/amdfam10/sspr1.asl deleted file mode 100644 index ec1dc01427..0000000000 --- a/src/northbridge/amd/amdfam10/sspr1.asl +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -DefinitionBlock ("SSPR.aml", "SSDT", 1, "AMD-FAM10", "AMD-ACPI", 100925441) -{ - Scope (\_SB) - { - Processor (\_SB.CPAA, 0xbb, 0x120, 6) // CPU0 and 0x01 need to be updated - { - Name(_PCT, Package () - { - ResourceTemplate() {Register (FFixedHW, 0, 0, 0)}, //PERF_CTRL - ResourceTemplate() {Register (FFixedHW, 0, 0, 0)}, //PERF_STATUS - }) - - Name(_PSS, Package() - { - Package(0x06) {0x1111, 0x222222, 0x3333, 0x4444, 0x55, 0x66 }, - }) - } - - } -} diff --git a/src/northbridge/amd/amdfam10/sspr2.asl b/src/northbridge/amd/amdfam10/sspr2.asl deleted file mode 100644 index d51f2b22b5..0000000000 --- a/src/northbridge/amd/amdfam10/sspr2.asl +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -DefinitionBlock ("SSPR.aml", "SSDT", 1, "AMD-FAM10", "AMD-ACPI", 100925441) -{ - Scope (\_SB) - { - Processor (\_SB.CPAA, 0xbb, 0x120, 6) // CPU0 and 0x01 need to be updated - { - Name(_PCT, Package () - { - ResourceTemplate() {Register (FFixedHW, 0, 0, 0)}, //PERF_CTRL - ResourceTemplate() {Register (FFixedHW, 0, 0, 0)}, //PERF_STATUS - }) - - Name(_PSS, Package() - { - Package(0x06) {0x1111, 0x222222, 0x3333, 0x4444, 0x55, 0x66 }, - Package(0x06) {0x7777, 0x222222, 0x3333, 0x4444, 0x55, 0x66 }, - }) - } - - } -} diff --git a/src/northbridge/amd/amdfam10/sspr3.asl b/src/northbridge/amd/amdfam10/sspr3.asl deleted file mode 100644 index ac99c47862..0000000000 --- a/src/northbridge/amd/amdfam10/sspr3.asl +++ /dev/null @@ -1,41 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -DefinitionBlock ("SSPR.aml", "SSDT", 1, "AMD-FAM10", "AMD-ACPI", 100925441) -{ - Scope (\_SB) - { - Processor (\_SB.CPAA, 0xbb, 0x120, 6) // CPU0 and 0x01 need to be updated - { - Name(_PCT, Package () - { - ResourceTemplate() {Register (FFixedHW, 0, 0, 0)}, //PERF_CTRL - ResourceTemplate() {Register (FFixedHW, 0, 0, 0)}, //PERF_STATUS - }) - - Name(_PSS, Package() - { - Package(0x06) {0x1111, 0x222222, 0x3333, 0x4444, 0x55, 0x66 }, - Package(0x06) {0x7777, 0x222222, 0x3333, 0x4444, 0x55, 0x66 }, - Package(0x06) {0x8888, 0x222222, 0x3333, 0x4444, 0x55, 0x66 }, - }) - } - - } -} diff --git a/src/northbridge/amd/amdfam10/sspr4.asl b/src/northbridge/amd/amdfam10/sspr4.asl deleted file mode 100644 index fac59bf1ab..0000000000 --- a/src/northbridge/amd/amdfam10/sspr4.asl +++ /dev/null @@ -1,42 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -DefinitionBlock ("SSPR.aml", "SSDT", 1, "AMD-FAM10", "AMD-ACPI", 100925441) -{ - Scope (\_SB) - { - Processor (\_SB.CPAA, 0xbb, 0x120, 6) // CPU0 and 0x01 need to be updated - { - Name(_PCT, Package () - { - ResourceTemplate() {Register (FFixedHW, 0, 0, 0)}, //PERF_CTRL - ResourceTemplate() {Register (FFixedHW, 0, 0, 0)}, //PERF_STATUS - }) - - Name(_PSS, Package() - { - Package(0x06) {0x1111, 0x222222, 0x3333, 0x4444, 0x55, 0x66 }, - Package(0x06) {0x7777, 0x222222, 0x3333, 0x4444, 0x55, 0x66 }, - Package(0x06) {0x8888, 0x222222, 0x3333, 0x4444, 0x55, 0x66 }, - Package(0x06) {0x9999, 0x222222, 0x3333, 0x4444, 0x55, 0x66 }, - }) - } - - } -} diff --git a/src/northbridge/amd/amdfam10/sspr5.asl b/src/northbridge/amd/amdfam10/sspr5.asl deleted file mode 100644 index 19c0cc9bb4..0000000000 --- a/src/northbridge/amd/amdfam10/sspr5.asl +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -DefinitionBlock ("SSPR.aml", "SSDT", 1, "AMD-FAM10", "AMD-ACPI", 100925441) -{ - Scope (\_SB) - { - Processor (\_SB.CPAA, 0xbb, 0x120, 6) // CPU0 and 0x01 need to be updated - { - Name(_PCT, Package () - { - ResourceTemplate() {Register (FFixedHW, 0, 0, 0)}, //PERF_CTRL - ResourceTemplate() {Register (FFixedHW, 0, 0, 0)}, //PERF_STATUS - }) - - Name(_PSS, Package() - { - Package(0x06) {0x1111, 0x222222, 0x3333, 0x4444, 0x55, 0x66 }, - Package(0x06) {0x7777, 0x222222, 0x3333, 0x4444, 0x55, 0x66 }, - Package(0x06) {0x8888, 0x222222, 0x3333, 0x4444, 0x55, 0x66 }, - Package(0x06) {0x9999, 0x222222, 0x3333, 0x4444, 0x55, 0x66 }, - Package(0x06) {0xaaaa, 0x222222, 0x3333, 0x4444, 0x55, 0x66 }, - }) - } - - } -} diff --git a/src/northbridge/amd/amdk8/acpi.c b/src/northbridge/amd/amdk8/acpi.c index a2dedd3e7d..2706c64c4f 100644 --- a/src/northbridge/amd/amdk8/acpi.c +++ b/src/northbridge/amd/amdk8/acpi.c @@ -118,8 +118,6 @@ unsigned long acpi_fill_srat(unsigned long current) { struct acpi_srat_mem_state srat_mem_state; - get_bus_conf(); - /* create all subtables for processors */ current = acpi_create_srat_lapics(current); @@ -143,8 +141,6 @@ unsigned long acpi_fill_slit(unsigned long current) /* fill the first 8 byte with that num */ /* fill the next num*num byte with distance, local is 10, 1 hop mean 20, and 2 hop with 30.... */ - get_bus_conf(); - /* because We has assume that we know the topology of the HT connection, So we can have set if we know the node_num */ static u8 hops_8[] = { 0, 1, 1, 2, 2, 3, 3, 4, 1, 0, 2, 1, 3, 2, 4, 3, diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index a91a4994b0..081ec6d658 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -593,6 +593,9 @@ static unsigned long northbridge_write_acpi_tables(unsigned long start, acpi_rsd current = start; + /* Fills sysconf structure needed for SRAT and SLIT. */ + get_bus_conf(); + current = ALIGN(current, 16); srat = (acpi_srat_t *) current; printk(BIOS_DEBUG, "ACPI: * SRAT @ %p\n", srat); -- cgit v1.2.3