From 41dd3dbd5e5619b9957de6850541af7cfe21a1a8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Tue, 3 Jul 2012 11:36:44 +0300 Subject: Intel e7505: provide get_top_of_ram MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is required to enable EARLY_CBMEM_INIT. Change-Id: I6d8caf382aa48eded81c1e94bbbcd3975ea88a1a Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/2550 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer Reviewed-by: Paul Menzel --- src/northbridge/intel/e7505/raminit.c | 6 ++++++ src/northbridge/intel/e7505/raminit.h | 1 + 2 files changed, 7 insertions(+) (limited to 'src/northbridge') diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c index 2f558f5231..9fba602833 100644 --- a/src/northbridge/intel/e7505/raminit.c +++ b/src/northbridge/intel/e7505/raminit.c @@ -1889,6 +1889,12 @@ void e7505_mch_init(const struct mem_controller *memctrl) sdram_enable(memctrl); } +unsigned long get_top_of_ram(void) +{ + u32 tolm = (pci_read_config16(MCHDEV, TOLM) & ~0x7ff) << 16; + return (unsigned long) tolm; +} + /** * Scrub and reset error counts for ECC dimms. * diff --git a/src/northbridge/intel/e7505/raminit.h b/src/northbridge/intel/e7505/raminit.h index 8eb4990364..f9ba7968be 100644 --- a/src/northbridge/intel/e7505/raminit.h +++ b/src/northbridge/intel/e7505/raminit.h @@ -20,6 +20,7 @@ void e7505_mch_scrub_ecc(unsigned long ret_addr); void e7505_mch_done(const struct mem_controller *memctrl); int e7505_mch_is_ready(void); +unsigned long get_top_of_ram(void); /* Mainboard exports this. */ int spd_read_byte(unsigned device, unsigned address); -- cgit v1.2.3