From 5926ae24a6fa4ebf83f24281c3df88b61076b838 Mon Sep 17 00:00:00 2001
From: Patrick Rudolph <patrick.rudolph@9elements.com>
Date: Mon, 4 Mar 2019 15:14:29 +0100
Subject: drivers/intel/fsp1_0: Deduplicate code

Move ChipsetFspReturnPoint() to drivers/intel/fsp1_0.

Allows to have a common entry after FSP-M.

Change-Id: I064ae67041c521ee92877cff30c814fce7b08e1f
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31713
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: David Guckian
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
---
 src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c | 13 -------------
 1 file changed, 13 deletions(-)

(limited to 'src/northbridge')

diff --git a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
index ec36c06c16..04a696c2c2 100644
--- a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
+++ b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
@@ -19,7 +19,6 @@
 #include <console/console.h>
 #include <bootstate.h>
 #include <cbmem.h>
-#include <cf9_reset.h>
 #include <device/device.h>
 #include <southbridge/intel/fsp_rangeley/pci_devs.h>
 #include <drivers/intel/fsp1_0/fsp_util.h>
@@ -166,16 +165,4 @@ void chipset_fsp_early_init(FSP_INIT_PARAMS *pFspInitParams,
 	return;
 }
 
-/* The FSP returns here after the fsp_early_init call */
-void ChipsetFspReturnPoint(EFI_STATUS Status,
-		VOID *HobListPtr)
-{
-	*(void **)CBMEM_FSP_HOB_PTR = HobListPtr;
-
-	if (Status == 0xFFFFFFFF) {
-		system_reset();
-	}
-	romstage_main_continue(Status, HobListPtr);
-}
-
 #endif	/* __PRE_RAM__ */
-- 
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