From 8a13743569a8d1ac61b8a52d2dab621ff4041de2 Mon Sep 17 00:00:00 2001 From: Alexandru Gagniuc Date: Mon, 5 Oct 2015 08:00:51 -0700 Subject: x86 chipsets: Link non-code flow CHIPSET_BOOTBLOCK_INCLUDE files Non-code flow assembly stubs do not have to be included in bootblock.S, now that we have more freedom in bootblock linking. Rather than bringing these stubs to the config system, just link them in the bootblock. Note that we cannot fully remove CHIPSET_BOOTBLOCK_INCLUDE at this point, as some intel SOCs use this stub for code flow. objdump -h build/cbfs/fallback/bootblock.debug on a few random boards confirms that the appropriate sections are still included in the final binary. Change-Id: Id3f9ece14e399c1cc83090f407780c4a05a076f0 Signed-off-by: Alexandru Gagniuc Reviewed-on: https://review.coreboot.org/11856 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/northbridge/via/vx800/Kconfig | 8 ----- src/northbridge/via/vx800/Makefile.inc | 1 + src/northbridge/via/vx800/romstrap.S | 47 ++++++++++++++++++++++++++++ src/northbridge/via/vx800/romstrap.inc | 47 ---------------------------- src/northbridge/via/vx900/Kconfig | 4 --- src/northbridge/via/vx900/Makefile.inc | 1 + src/northbridge/via/vx900/romstrap.S | 56 ++++++++++++++++++++++++++++++++++ src/northbridge/via/vx900/romstrap.inc | 56 ---------------------------------- 8 files changed, 105 insertions(+), 115 deletions(-) create mode 100644 src/northbridge/via/vx800/romstrap.S delete mode 100644 src/northbridge/via/vx800/romstrap.inc create mode 100644 src/northbridge/via/vx900/romstrap.S delete mode 100644 src/northbridge/via/vx900/romstrap.inc (limited to 'src/northbridge') diff --git a/src/northbridge/via/vx800/Kconfig b/src/northbridge/via/vx800/Kconfig index d7d5349685..9eb84fb14e 100644 --- a/src/northbridge/via/vx800/Kconfig +++ b/src/northbridge/via/vx800/Kconfig @@ -3,11 +3,3 @@ config NORTHBRIDGE_VIA_VX800 select HAVE_DEBUG_RAM_SETUP select HAVE_DEBUG_SMBUS select LATE_CBMEM_INIT - -if NORTHBRIDGE_VIA_VX800 - -config CHIPSET_BOOTBLOCK_INCLUDE - string - default "northbridge/via/vx800/romstrap.inc" - -endif diff --git a/src/northbridge/via/vx800/Makefile.inc b/src/northbridge/via/vx800/Makefile.inc index 069ea8e1b7..90574eda67 100644 --- a/src/northbridge/via/vx800/Makefile.inc +++ b/src/northbridge/via/vx800/Makefile.inc @@ -22,5 +22,6 @@ ramstage-y += lpc.c ramstage-y += ide.c bootblock-y += romstrap.ld +bootblock-y += romstrap.S endif diff --git a/src/northbridge/via/vx800/romstrap.S b/src/northbridge/via/vx800/romstrap.S new file mode 100644 index 0000000000..82b5b4b63b --- /dev/null +++ b/src/northbridge/via/vx800/romstrap.S @@ -0,0 +1,47 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2004 Tyan Computer + * (Written by Yinghai Lu for Tyan Computer) + * Copyright (C) 2007 Rudolf Marek + * Copyright (C) 2009 One Laptop per Child, Association, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* This file constructs the ROM strap table for K8T890 and K8M890 */ + + .section ".romstrap", "a", @progbits + + .globl __romstrap_start +__romstrap_start: +tblpointer: + .long 0x55aa66cc + .long 0x88012554 + .long 0x77107777 + .long 0x00770814 + + + .long 0x00000000 + .long 0x00000000 + .long 0x00000000 + .long 0x00000000 + +/* + * The pointer to above table should be at 0xffffffd0, + * the table itself MUST be aligned to 128B it seems! + */ +rspointers: + .long tblpointer // It will be 0xffffffd0 + + .globl __romstrap_end + +__romstrap_end: +.previous diff --git a/src/northbridge/via/vx800/romstrap.inc b/src/northbridge/via/vx800/romstrap.inc deleted file mode 100644 index 82b5b4b63b..0000000000 --- a/src/northbridge/via/vx800/romstrap.inc +++ /dev/null @@ -1,47 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2004 Tyan Computer - * (Written by Yinghai Lu for Tyan Computer) - * Copyright (C) 2007 Rudolf Marek - * Copyright (C) 2009 One Laptop per Child, Association, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* This file constructs the ROM strap table for K8T890 and K8M890 */ - - .section ".romstrap", "a", @progbits - - .globl __romstrap_start -__romstrap_start: -tblpointer: - .long 0x55aa66cc - .long 0x88012554 - .long 0x77107777 - .long 0x00770814 - - - .long 0x00000000 - .long 0x00000000 - .long 0x00000000 - .long 0x00000000 - -/* - * The pointer to above table should be at 0xffffffd0, - * the table itself MUST be aligned to 128B it seems! - */ -rspointers: - .long tblpointer // It will be 0xffffffd0 - - .globl __romstrap_end - -__romstrap_end: -.previous diff --git a/src/northbridge/via/vx900/Kconfig b/src/northbridge/via/vx900/Kconfig index c7641d14ce..2d2dffaa69 100644 --- a/src/northbridge/via/vx900/Kconfig +++ b/src/northbridge/via/vx900/Kconfig @@ -39,8 +39,4 @@ config VGA_BIOS_ID string default "1106,7122" -config CHIPSET_BOOTBLOCK_INCLUDE - string - default "northbridge/via/vx900/romstrap.inc" - endif diff --git a/src/northbridge/via/vx900/Makefile.inc b/src/northbridge/via/vx900/Makefile.inc index 4cac1e7d1f..44f0ae01ce 100644 --- a/src/northbridge/via/vx900/Makefile.inc +++ b/src/northbridge/via/vx900/Makefile.inc @@ -44,5 +44,6 @@ ramstage-y += ./../../../drivers/pc80/vga/vga_io.c bootblock-y += romstrap.ld +bootblock-y += romstrap.S endif diff --git a/src/northbridge/via/vx900/romstrap.S b/src/northbridge/via/vx900/romstrap.S new file mode 100644 index 0000000000..26c1ee694a --- /dev/null +++ b/src/northbridge/via/vx900/romstrap.S @@ -0,0 +1,56 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2004 Tyan Computer + * (Written by Yinghai Lu for Tyan Computer) + * Copyright (C) 2007 Rudolf Marek + * Copyright (C) 2009 One Laptop per Child, Association, Inc. + * Copyright (C) 2011-2012 Alexandru Gagniuc + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* As extracted from the manufacturer's ROM, the romstrap table looks like: + * .long 0x77886047 .long 0x00777777 + * .long 0x00000000 .long 0x00000000 + * .long 0x00888888 .long 0x00AA1111 + * .long 0x00000000 .long 0x00000000 + * + * The vendor BIOS then adjusts some of these settings very early on. Instead of + * adjusting those settings in code, we work them in the romstrap table. + * + */ +/* This file constructs the ROM strap table for VX900 */ + + .section ".romstrap", "a", @progbits + + .globl __romstrap_start +__romstrap_start: +tblpointer: + .long 0x77886047 + .long 0x00777777 + .long 0x00000000 + .long 0x00000000 + .long 0x00888888 + .long 0x00AA1111 + .long 0x00000000 + .long 0x00000000 + +/* + * The pointer to above table should be at 0xffffffd0, + * the table itself MUST be aligned to 128B it seems! + */ +rspointers: + .long tblpointer // It will be 0xffffffd0 + + .globl __romstrap_end + +__romstrap_end: +.previous diff --git a/src/northbridge/via/vx900/romstrap.inc b/src/northbridge/via/vx900/romstrap.inc deleted file mode 100644 index 26c1ee694a..0000000000 --- a/src/northbridge/via/vx900/romstrap.inc +++ /dev/null @@ -1,56 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2004 Tyan Computer - * (Written by Yinghai Lu for Tyan Computer) - * Copyright (C) 2007 Rudolf Marek - * Copyright (C) 2009 One Laptop per Child, Association, Inc. - * Copyright (C) 2011-2012 Alexandru Gagniuc - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* As extracted from the manufacturer's ROM, the romstrap table looks like: - * .long 0x77886047 .long 0x00777777 - * .long 0x00000000 .long 0x00000000 - * .long 0x00888888 .long 0x00AA1111 - * .long 0x00000000 .long 0x00000000 - * - * The vendor BIOS then adjusts some of these settings very early on. Instead of - * adjusting those settings in code, we work them in the romstrap table. - * - */ -/* This file constructs the ROM strap table for VX900 */ - - .section ".romstrap", "a", @progbits - - .globl __romstrap_start -__romstrap_start: -tblpointer: - .long 0x77886047 - .long 0x00777777 - .long 0x00000000 - .long 0x00000000 - .long 0x00888888 - .long 0x00AA1111 - .long 0x00000000 - .long 0x00000000 - -/* - * The pointer to above table should be at 0xffffffd0, - * the table itself MUST be aligned to 128B it seems! - */ -rspointers: - .long tblpointer // It will be 0xffffffd0 - - .globl __romstrap_end - -__romstrap_end: -.previous -- cgit v1.2.3