From 1fc43aa6f263db2aec76bd9510bf32470a858bae Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Tue, 4 Aug 2020 17:54:01 +0200 Subject: security/intel/txt: Allow using CF9 reset, too Soften the hard dependency on SOC_INTEL_COMMON_BLOCK_SA by allowing CF9 resets to be used in place of global resets. If both types of reset are available, prefer a global reset. This preserves current behavior, and allows more platforms to use the TXT support code, such as Haswell. Change-Id: I034fa0b342135e7101c21646be8fd6b5d3252d9e Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/44181 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Deppenwiese --- src/security/intel/txt/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/security/intel/txt/Kconfig') diff --git a/src/security/intel/txt/Kconfig b/src/security/intel/txt/Kconfig index edb13a51b5..3dd912ea6e 100644 --- a/src/security/intel/txt/Kconfig +++ b/src/security/intel/txt/Kconfig @@ -9,7 +9,7 @@ config INTEL_TXT depends on (TPM1 || TPM2) depends on CPU_INTEL_FIRMWARE_INTERFACE_TABLE depends on PLATFORM_HAS_DRAM_CLEAR - depends on SOC_INTEL_COMMON_BLOCK_SA + depends on (SOC_INTEL_COMMON_BLOCK_SA || HAVE_CF9_RESET) if INTEL_TXT -- cgit v1.2.3