From 7336f97debc883d293e4d5f942c556d1f8931842 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 8 Jun 2020 06:05:03 +0300 Subject: treewide: Replace CONFIG(ARCH_xx) tests MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Once we support building stages for different architectures, such CONFIG(ARCH_xx) tests do not evaluate correctly anymore. Change-Id: I599995b3ed5c4dfd578c87067fe8bfc8c75b9d43 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/42183 Reviewed-by: Raul Rangel Reviewed-by: Furquan Shaikh Reviewed-by: Angel Pons Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/security/memory/memory_clear.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/security') diff --git a/src/security/memory/memory_clear.c b/src/security/memory/memory_clear.c index a550eebf4a..031ca84abe 100644 --- a/src/security/memory/memory_clear.c +++ b/src/security/memory/memory_clear.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#if CONFIG(ARCH_X86) +#if ENV_X86 #include #else #define memset_pae(a, b, c, d, e) 0 @@ -83,7 +83,7 @@ static void clear_memory(void *unused) cbmem_get_region(&baseptr, &size); memranges_insert(&mem, (uintptr_t)baseptr, size, BM_MEM_TABLE); - if (CONFIG(ARCH_X86)) { + if (ENV_X86) { /* Find space for PAE enabled memset */ pgtbl = get_free_memory_range(&mem, MEMSET_PAE_PGTL_ALIGN, MEMSET_PAE_PGTL_SIZE); @@ -114,7 +114,7 @@ static void clear_memory(void *unused) range_entry_size(r)); } /* Use PAE if available */ - else if (CONFIG(ARCH_X86)) { + else if (ENV_X86) { if (memset_pae(range_entry_base(r), 0, range_entry_size(r), (void *)pgtbl, (void *)vmem_addr)) @@ -126,7 +126,7 @@ static void clear_memory(void *unused) } } - if (CONFIG(ARCH_X86)) { + if (ENV_X86) { /* Clear previously skipped memory reserved for pagetables */ printk(BIOS_DEBUG, "%s: Clearing DRAM %016lx-%016lx\n", __func__, pgtbl, pgtbl + MEMSET_PAE_PGTL_SIZE); -- cgit v1.2.3