From 144c7aa34bffba7b65566e037f0588ace8b00eba Mon Sep 17 00:00:00 2001
From: Felix Held <felix-coreboot@felixheld.de>
Date: Tue, 4 May 2021 21:06:04 +0200
Subject: soc/amd/cezanne/agesa_acpi: add and call agesa_write_acpi_tables

This function will be used to add some SSDTs.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ia88cb5ea483850a8659f3bae8040c82eb2735d26
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52902
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
---
 src/soc/amd/cezanne/chip.c | 3 +++
 1 file changed, 3 insertions(+)

(limited to 'src/soc/amd/cezanne/chip.c')

diff --git a/src/soc/amd/cezanne/chip.c b/src/soc/amd/cezanne/chip.c
index 8625bd75f1..625f46ce8e 100644
--- a/src/soc/amd/cezanne/chip.c
+++ b/src/soc/amd/cezanne/chip.c
@@ -4,6 +4,7 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <fsp/api.h>
+#include <soc/acpi.h>
 #include <soc/cpu.h>
 #include <soc/data_fabric.h>
 #include <soc/pci_devs.h>
@@ -79,6 +80,8 @@ static void enable_dev(struct device *dev)
 
 static void soc_init(void *chip_info)
 {
+	default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables;
+
 	fsp_silicon_init();
 
 	data_fabric_set_mmio_np();
-- 
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