From 144c7aa34bffba7b65566e037f0588ace8b00eba Mon Sep 17 00:00:00 2001
From: Felix Held <felix-coreboot@felixheld.de>
Date: Tue, 4 May 2021 21:06:04 +0200
Subject: soc/amd/cezanne/agesa_acpi: add and call agesa_write_acpi_tables

This function will be used to add some SSDTs.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ia88cb5ea483850a8659f3bae8040c82eb2735d26
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52902
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
---
 src/soc/amd/cezanne/include/soc/acpi.h | 8 ++++++++
 1 file changed, 8 insertions(+)

(limited to 'src/soc/amd/cezanne/include')

diff --git a/src/soc/amd/cezanne/include/soc/acpi.h b/src/soc/amd/cezanne/include/soc/acpi.h
index 1b1d2fbb14..ab90c96c7b 100644
--- a/src/soc/amd/cezanne/include/soc/acpi.h
+++ b/src/soc/amd/cezanne/include/soc/acpi.h
@@ -3,6 +3,11 @@
 #ifndef AMD_CEZANNE_ACPI_H
 #define AMD_CEZANNE_ACPI_H
 
+#include <acpi/acpi.h>
+#include <amdblocks/acpi.h>
+#include <device/device.h>
+#include <stdint.h>
+
 #define ACPI_SCI_IRQ 9
 
 /* RTC Registers */
@@ -10,4 +15,7 @@
 #define RTC_ALT_CENTURY		0x32
 #define RTC_CENTURY		0x48
 
+uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current,
+				  acpi_rsdp_t *rsdp);
+
 #endif /* AMD_CEZANNE_ACPI_H */
-- 
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