From dd5264612ae8145c8c8e38d2ff3fb7e47de8e4b2 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Mon, 4 May 2020 22:54:22 -0700 Subject: soc/amd/common/block: Add header file for eSPI register definitions This change adds eSPI register definitions for I/O and MMIO decode using eSPI on AMD SoCs. Additionally, it also adds a macro to define the offset of ESPI MMIO base from SPI MMIO base. BUG=b:153675913 Change-Id: Ifb70ae0c63cc823334a1d851faf4dda6d1c1fc1a Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/c/coreboot/+/41072 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel Reviewed-by: Aaron Durbin --- src/soc/amd/common/block/include/amdblocks/espi.h | 27 +++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 src/soc/amd/common/block/include/amdblocks/espi.h (limited to 'src/soc/amd/common/block/include') diff --git a/src/soc/amd/common/block/include/amdblocks/espi.h b/src/soc/amd/common/block/include/amdblocks/espi.h new file mode 100644 index 0000000000..82410e58d3 --- /dev/null +++ b/src/soc/amd/common/block/include/amdblocks/espi.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* This file is part of the coreboot project. */ + +#ifndef __AMDBLOCKS_ESPI_H__ +#define __AMDBLOCKS_ESPI_H__ + +/* eSPI MMIO base lives at an offset of 0x10000 from the address in SPI BAR. */ +#define ESPI_OFFSET_FROM_BAR 0x10000 + +#define ESPI_DECODE 0x40 +#define ESPI_DECODE_MMIO_RANGE_EN(range) (1 << (((range) & 3) + 12)) +#define ESPI_DECODE_IO_RANGE_EN(range) (1 << (((range) & 3) + 8)) +#define ESPI_DECODE_IO_0x80_EN (1 << 2) +#define ESPI_DECODE_IO_0X60_0X64_EN (1 << 1) +#define ESPI_DECODE_IO_0X2E_0X2F_EN (1 << 0) + +#define ESPI_IO_RANGE_BASE(range) (0x44 + ((range) & 3) * 2) +#define ESPI_IO_RANGE_SIZE(range) (0x4c + ((range) & 3)) +#define ESPI_MMIO_RANGE_BASE(range) (0x50 + ((range) & 3) * 4) +#define ESPI_MMIO_RANGE_SIZE(range) (0x60 + ((range) & 3) * 2) + +#define ESPI_GENERIC_IO_WIN_COUNT 4 +#define ESPI_GENERIC_IO_MAX_WIN_SIZE 0x100 +#define ESPI_GENERIC_MMIO_WIN_COUNT 4 +#define ESPI_GENERIC_MMIO_MAX_WIN_SIZE 0x10000 + +#endif /* __AMDBLOCKS_ESPI_H__ */ -- cgit v1.2.3