From 2ff76be15cf21b8e9af298e797ee75732af31838 Mon Sep 17 00:00:00 2001 From: Raul E Rangel Date: Tue, 6 Apr 2021 15:41:22 -0600 Subject: soc/amd/common: Add PM_ESPI_INTR_CTRL This register is used for masking/unmasking eSPI IRQs. BUG=none TEST=Build guybrush Signed-off-by: Raul E Rangel Change-Id: Ia209539b2e0ce390e227757b16c2969b9124a845 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52142 Reviewed-by: Martin Roth Reviewed-by: Rob Barnes Tested-by: build bot (Jenkins) --- src/soc/amd/common/block/include/amdblocks/acpimmio.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/soc/amd/common') diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio.h b/src/soc/amd/common/block/include/amdblocks/acpimmio.h index 9360650851..9c007e7668 100644 --- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h +++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h @@ -26,6 +26,8 @@ #define LEGACY_DMA_IO_EN (1 << 2) #define CF9_IO_EN (1 << 1) #define LEGACY_IO_EN (1 << 0) +#define PM_ESPI_INTR_CTRL 0x40 +#define PM_ESPI_DEV_INTR_MASK 0x00FFFFFF #define PM_RST_CTRL1 0xbe #define SLPTYPE_CONTROL_EN (1 << 5) #define KBRSTEN (1 << 4) -- cgit v1.2.3