From 78025f6c5c8a65d662c3af7d8de2ad5a59752419 Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Thu, 13 Jun 2019 16:03:47 -0600 Subject: soc/amd/picasso: Remove all AGESA references Family 17h will not use the Arch2008 (a.k.a. v5) wrapper. Remove all source, support functions, and comments related to AGESA. Family 17h requires v9 which has no similarities to v5 for integration into a host firmware. AGESA v9 support will be added via subsequent patches into the appropriate locations. Change-Id: Iea1a41941a0ba364a6abaaf31cc8e1145db4a236 Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/c/coreboot/+/33755 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Martin Roth --- src/soc/amd/picasso/Kconfig | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) (limited to 'src/soc/amd/picasso/Kconfig') diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 33aae2655f..a930f60d27 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -49,8 +49,6 @@ config CPU_SPECIFIC_OPTIONS select SOC_AMD_COMMON_BLOCK_PCI select SOC_AMD_COMMON_BLOCK_HDA select SOC_AMD_COMMON_BLOCK_SATA - select SOC_AMD_COMMON_BLOCK_PI - select SOC_AMD_COMMON_BLOCK_CAR select SOC_AMD_COMMON_BLOCK_S3 select C_ENVIRONMENT_BOOTBLOCK select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH @@ -106,18 +104,6 @@ config CPU_ADDR_BITS int default 48 -config BOTTOMIO_POSITION - hex "Bottom of 32-bit IO space" - default 0xD0000000 - help - If PCI peripherals with big BARs are connected to the system - the bottom of the IO must be decreased to allocate such - devices. - - Declare the beginning of the 128MB-aligned MMIO region. This - option is useful when PCI peripherals requesting large address - ranges are present. - config MMCONF_BASE_ADDRESS hex default 0xF8000000 @@ -199,7 +185,7 @@ config PICASSO_LEGACY_FREE bool "System is legacy free" help Select y if there is no keyboard controller in the system. - This sets variables in AGESA and ACPI. + This sets a variable in ACPI. config SERIRQ_CONTINUOUS_MODE bool @@ -213,7 +199,6 @@ config PICASSO_ACPI_IO_BASE default 0x400 help Base address for the ACPI registers. - This value must match the hardcoded value of AGESA. config PICASSO_UART bool "UART controller on Picasso" -- cgit v1.2.3