From e2c24f783d78c582fb56625768b9ac424b5943c9 Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Thu, 20 Jun 2019 08:47:58 -0600 Subject: soc/amd/picasso: Update i2c support Change the stoneyridge definitions into picasso. The named 0 and 1 buses are controlled by the PSP and not directly accessible by host firmware. I2C4 operates only in slave mode so is not added to to the bus clear-after-reset sequence. The I2C controller is fundamentally the same as on Stoney Ridge so the ability to clear a potentially jammed bus is still required. Program Picasso's new pad control registers in the MISC AcpiMmio space according to the recommended settings. Signed-off-by: Marshall Dawson Change-Id: Ibbc5504ebc36654e28c79fe3ae17cc0d9255118f Reviewed-on: https://review.coreboot.org/c/coreboot/+/33763 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/amd/picasso/acpi/globalnvs.asl | 7 +++---- src/soc/amd/picasso/acpi/sb_pci0_fch.asl | 10 ---------- 2 files changed, 3 insertions(+), 14 deletions(-) (limited to 'src/soc/amd/picasso/acpi') diff --git a/src/soc/amd/picasso/acpi/globalnvs.asl b/src/soc/amd/picasso/acpi/globalnvs.asl index cc264e6f85..04e41a1b57 100644 --- a/src/soc/amd/picasso/acpi/globalnvs.asl +++ b/src/soc/amd/picasso/acpi/globalnvs.asl @@ -48,12 +48,11 @@ Field (GNVS, ByteAcc, NoLock, Preserve) TPSV, 8, // 0x2F - Passive Threshold TMAX, 8, // 0x30 - CPU Tj_max Offset (0x34), // 0x34 - AOAC Device Enables - , 5, - IC0E, 1, // I2C0, 5 - IC1E, 1, // I2C1, 6 + , 7, IC2E, 1, // I2C2, 7 IC3E, 1, // I2C3, 8 - , 2, + IC4E, 1, // I2C4, 9 + , 1, UT0E, 1, // UART0, 11 UT1E, 1, // UART1, 12 , 2, diff --git a/src/soc/amd/picasso/acpi/sb_pci0_fch.asl b/src/soc/amd/picasso/acpi/sb_pci0_fch.asl index 206fdfd0e1..b9eeadb4ae 100644 --- a/src/soc/amd/picasso/acpi/sb_pci0_fch.asl +++ b/src/soc/amd/picasso/acpi/sb_pci0_fch.asl @@ -484,16 +484,6 @@ Method(FWAK,0, Serialized) /* FCH _WAK */ FDDC(12, 3) } } - if(LEqual(\IC0E, zero)) { - if(LNotEqual(I0TD, 0x03)) { - FDDC(5, 3) - } - } - if(LEqual(\IC1E, zero)) { - if(LNotEqual(I1TD, 0x03)) { - FDDC(6, 3) - } - } if(LEqual(\IC2E, zero)) { if(LNotEqual(I2TD, 0x03)) { FDDC(7, 3) -- cgit v1.2.3