From bcb3d0397303272ed201f46bb41c4d029f384fa1 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Fri, 24 Jul 2020 19:10:03 +0200 Subject: soc/amd/picasso: make USB over-current pin mapping configurable Neither the family 17h model 10-1Fh PPR nor the internal FSP source seems to have the mapping of the USB OC pins to the four bit values, so this is based on the information from the family 15h model 70-7Fh BKDG which also corresponds to what I'd have expected here. BUG=b:162010077 Change-Id: I581ef1d730e9d729d9849d7e73ef1c1b67b2c4cf Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/43833 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/soc/amd/picasso/chip.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'src/soc/amd/picasso/chip.h') diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h index 64258b24ca..62272c0927 100644 --- a/src/soc/amd/picasso/chip.h +++ b/src/soc/amd/picasso/chip.h @@ -137,6 +137,15 @@ struct soc_amd_picasso_config { uint8_t has_usb2_phy_tune_params; struct usb2_phy_tune usb_2_port_tune_params[USB_PORT_COUNT]; + enum { + USB_OC_PIN_0 = 0x0, + USB_OC_PIN_1 = 0x1, + USB_OC_PIN_2 = 0x2, + USB_OC_PIN_3 = 0x3, + USB_OC_PIN_4 = 0x4, + USB_OC_PIN_5 = 0x5, + USB_OC_NONE = 0xf, + } usb_port_overcurrent_pin[USB_PORT_COUNT]; }; typedef struct soc_amd_picasso_config config_t; -- cgit v1.2.3