From bc45650b5fba1da8214687aaef36b60a1fa19a6c Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Wed, 10 Jun 2020 16:37:23 -0700 Subject: soc/amd/picasso: Place early stages and data buffers at the bottom of DRAM This change updates memlayout.ld for Picasso to place all early stages (bootblock, romstage, FSP-M, verstage) and data buffers (vboot workbuf, APOB, preram-cbmem console, timestamp, early BSP stack) at the bottom of DRAM starting at 32MiB. This uses static allocation for most components by defining Kconfig variables for base and size. It relies on the linker to complain if any of the assumptions are broken. This also allows romstage to use linker symbols for _early_reserved_dram and _eearly_reserved_dram to store information in CBMEM about the early DRAM usage by coreboot before ramstage starts execution. This allows ramstage to reserve this memory region in BIOS tables so that S3 resume can reuse the same space without corrupting OS memory. BUG=b:155322763 TEST=Verified memory reported by coreboot: Writing coreboot table at 0xcc656000 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000a0000-00000000000fffff: RESERVED 3. 0000000000100000-0000000001ffffff: RAM 4. 0000000002000000-000000000223ffff: RESERVED 5. 0000000002240000-00000000cc512fff: RAM 6. 00000000cc513000-00000000cc6bffff: CONFIGURATION TABLES 7. 00000000cc6c0000-00000000cc7c7fff: RAMSTAGE 8. 00000000cc7c8000-00000000cd7fffff: CONFIGURATION TABLES 9. 00000000cd800000-00000000cfffffff: RESERVED 10. 00000000f8000000-00000000fbffffff: RESERVED 11. 0000000100000000-000000042f33ffff: RAM 12. 000000042f340000-000000042fffffff: RESERVED Signed-off-by: Furquan Shaikh Change-Id: I009e1ea71b5b5a8e65eba16911897b2586ccfdb6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42264 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel --- src/soc/amd/picasso/include/soc/memmap.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 src/soc/amd/picasso/include/soc/memmap.h (limited to 'src/soc/amd/picasso/include') diff --git a/src/soc/amd/picasso/include/soc/memmap.h b/src/soc/amd/picasso/include/soc/memmap.h new file mode 100644 index 0000000000..f8b13cc415 --- /dev/null +++ b/src/soc/amd/picasso/include/soc/memmap.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __SOC_AMD_PICASSO_MEMMAP_H__ +#define __SOC_AMD_PICASSO_MEMMAP_H__ + +#include + +DECLARE_REGION(early_reserved_dram) + +struct memmap_early_dram { + uint32_t base; + uint32_t size; +}; + +void memmap_stash_early_dram_usage(void); +const struct memmap_early_dram *memmap_get_early_dram_usage(void); + +#endif /* __SOC_AMD_PICASSO_MEMMAP_H__ */ -- cgit v1.2.3